Method of extracting properties of a layer on a wafer
US-2024234216-A9 · Jul 11, 2024 · US
US9903711B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9903711-B2 |
| Application number | US-201615090389-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 4, 2016 |
| Priority date | Apr 6, 2015 |
| Publication date | Feb 27, 2018 |
| Grant date | Feb 27, 2018 |
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A metrology performance analysis system includes a metrology tool including one or more detectors and a controller communicatively coupled to the one or more detectors. The controller is configured to receive one or more metrology data sets associated with a metrology target from the metrology tool in which the one or more metrology data sets include one or more measured metrology metrics and the one or more measured metrology metrics indicate deviations from nominal values. The controller is further configured to determine relationships between the deviations from the nominal values and one or more selected semiconductor process variations, and determine one or more root causes of the deviations from the nominal values based on the relationships between values of the one or more metrology metrics and the one or more selected semiconductor process variations.
Opening claim text (preview).
What is claimed: 1. A metrology performance analysis system, comprising: a metrology tool including one or more detectors; and a controller communicatively coupled to the one or more detectors, the controller including one or more processors configured to execute program instructions configured to cause the one or more processors to: receive one or more metrology data sets associated with a metrology target from the metrology tool, wherein the one or more metrology data sets include one or more measured metrology metrics, wherein the one or more measured metrology metrics indicate one or more deviations from one or more nominal values; simulate, via a perturbed geometric model, one or more variations of the one or more measured metrology metrics based on one or more selected semiconductor process variations; determine, based on the simulated one or more variations, one or more relationships between the one or more deviations from the one or more nominal values and the one or more selected semiconductor process variations; and determine one or more root causes of the one or more deviations from the one or more nominal values based on the one or more relationships between the one or more deviations from the one or more nominal values and the one or more selected semiconductor process variations. 2. The system of claim 1 , wherein the one or more processors are further configured to execute program instructions configured to cause the one or more processors to: generate a geometric model of the metrology target; simulate one or more metrology metrics based on the geometric model of the metrology target; and generate the perturbed geometric model of the metrology target, wherein the perturbed geometric model includes one or more alterations of the metrology target caused by the one or more selected semiconductor process variations. 3. The system of claim 1 , wherein the metrology target is an overlay target. 4. The system of claim 3 , wherein the overlay target includes a grating-over-grating overlay target. 5. The system of claim 1 , wherein the one or more metrology metrics include at least one of a pupil image metric, a precision metric, a tool-induced shift metric, a sensitivity metric, a diffraction efficiency metric, or a through-focus slope metric. 6. The system of claim 1 , wherein the one or more metrology data sets include non-overlay data. 7. The system of claim 1 , wherein the one or more selected semiconductor process variations include at least one of a film thickness variation, a real refractive index value associated with one or more wavelengths, an imaginary refractive index value associated with one or more wavelengths, a planarity variation, a stress variation, a strain variation, a critical dimension variation, a dishing variation, an erosion variation, or a side wall angle variation. 8. The system of claim 1 , wherein the one or more processors are further configured to execute program instructions configured to cause the one or more processors to: modify a recipe of the one or more selected semiconductor processes based on the determined one or more root causes. 9. The system of claim 8 , wherein the one or more processors are further configured to execute program instructions configured to cause the one or more processors to: modify the recipe of the one or more selected semiconductor processes by modifying at least one of a wavelength or a polarization of an illumination beam associated with the metrology tool. 10. The system of claim 1 , wherein the one or more processors are further configured to execute program instructions configured to cause the one or more processors to: direct the metrology tool to replace the metrology target with an alternative metrology target, wherein the alternative metrology target is selected based on the determined one or more root causes. 11. The system of claim 10 , wherein the one or more processors are further configured to execute program instructions configured to cause the one or more processors to: direct the metrology tool to replace the metrology target with the alternative metrology target to reduce the one or more deviations from the one or more nominal values. 12. The system of claim 1 , wherein the metrology tool includes an ellipsometer. 13. The system of claim 12 , wherein the ellipsometer includes at least one of a single-wavelength ellipsometer, a spectroscopic ellipsometer, or an angle-resolved ellipsometer. 14. The system of claim 13 , wherein the ellipsometer includes a plurality of illumination beams directed to the metrology target at a plurality of angles of illumination. 15. The system of claim 13 , wherein the spectroscopic ellipsometer measures Mueller matrix elements. 16. The system of claim 1 , wherein the metrology tool includes a reflectometer. 17. The system of claim 16 , wherein the reflectometer includes at least one of a single-wavelength reflectometer, a spectroscopic reflectometer, or an angle-resolved reflectometer. 18. The system of claim 1 , wherein the metrology tool includes an imaging system. 19. The system of claim 18 , wherein the imaging system includes at least one of a pupil imaging system or a spectral imaging system. 20. The system of claim 1 , wherein the metrology tool includes an angle-resolved scatterometer with a pupil imaging system. 21. The system of claim 20 , wherein the one or more measured metrology metrics are extracted from a pupil image, wherein the metrology target is a grating-over-grating structure. 22. The system of claim 21 , wherein the one or more measured metrology metrics include a pupil feature in the pupil image. 23. The system of claim 22 , wherein the one or more relationships between the one or more deviations from the one or more nominal values and the one or more selected semiconductor process variations include a variation of a location of the pupil feature in the pupil image associated with a symmetric selected semiconductor process variation. 24. The system of claim 22 , wherein the one or more relationships between the one or more deviations from the one or more nominal values and the one or more selected semiconductor process variations include a variation of a strength of the pupil feature in the pupil image associated with an asymmetric selected semiconductor process variation. 25. The system of claim 22 , wherein the one or more relationships between the one or more deviations from the one or more nominal values and the one or more selected semiconductor process variations include a variation of a sign of the pupil feature in the pupil image associated with a directionality of an asymmetric selected semiconductor process variation. 26. The system of claim 25 , wherein the directionality of the asymmetric selected semiconductor process variation comprises: a directionality of a side wall angle asymmetry. 27. The system of claim 1 , wherein the one or more processors are further configured to execute program instructions configured to cause the one or more processors to: generate a map of one or more values of the one or more measured metrology metrics at one or more locations on a wafer surface; and determine the one or more root causes based on the generated map. 28. The system of claim 1 , wherein the metrology tool further comprises: an illumination source configured to generate an illumination bea
Controlling normal operating mode, e.g. matching different apparatus, remote control or prediction of failure · CPC title
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Controlling abnormal operating mode, e.g. taking account of waiting time, decision to rework or rework flow · CPC title
Diffuse reflection (precedence is given to G01N21/55 - G01N21/57 if specular component is taken into consideration), e.g. also for testing fluids, fibrous materials · CPC title
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