Emitter and method for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9887355-B2
Application number	US-201615079472-A
Country	US
Kind code	B2
Filing date	Mar 24, 2016
Priority date	Apr 15, 2015
Publication date	Feb 6, 2018
Grant date	Feb 6, 2018

Abstract

A method for manufacturing an emitter comprises providing a semiconductor substrate having a main surface, the semiconductor substrate comprising a cavity adjacent to the main surface. A portion of the semiconductor substrate arranged between the cavity and the main surface of the semiconductor substrate forms a support structure. The method comprises arranging an emitting element at the support structure, the emitting element being configured to emit a thermal radiation of the emitter, wherein the cavity provides a reduction of a thermal coupling between the emitting element and the semiconductor substrate.

First claim

The invention claimed is:

1. A method for manufacturing an emitter, the method comprising:
providing a semiconductor substrate having a main surface, the semiconductor substrate comprising a cavity, adjacent to the main surface, formed by a silicon-on-nothing process or a Venezia process,
wherein a portion of the semiconductor substrate arranged between the cavity and the main surface of the semiconductor substrate comprises semiconductor material formed as an epitaxial growth;

forming a support structure from the portion of the semiconductor substrate arranged between the cavity and the main surface;
forming at least one trench at the main surface and extending to the cavity; and
arranging an emitting element on or over the support structure to emit a thermal radiation of the emitter,
the emitting element being arranged on a different side of the main surface as the support structure such that opposite sides of the support structure are between the emitting element and a portion of the cavity,
wherein the cavity reduces thermal coupling between the emitting element and the semiconductor substrate.

2. The method according to claim 1 , wherein providing the semiconductor substrate comprises:
arranging the semiconductor substrate; and
forming the cavity in the semiconductor substrate such that the cavity is encapsulated by the semiconductor substrate and such that the semiconductor substrate and the support structure comprise a monocrystalline structure.

3. The method according to claim 2 , wherein providing the semiconductor substrate further comprises:
forming at least a second cavity arranged between the cavity and the main surface such that the second cavity is arranged between the support structure and such that a portion of the semiconductor substrate comprising the main surface at least partially covers the support structure.

4. The method according to claim 2 , wherein the cavity is formed such that the support structure and the semiconductor substrate are connected by a pillar-structure extending from the support structure along a direction parallel to a surface normal of the main surface.

5. The method according to claim 1 , wherein arranging the emitting element comprises arranging the emitting element on an oxide layer formed on the support structure.

6. The method according to claim 5 , wherein arranging the emitting element comprises:
producing the oxide layer at the main surface of the semiconductor substrate and at the support structure such that the oxide layer connects the main surface of the semiconductor substrate and a main surface of the support structure; and
arranging the thermal emitting material on the oxide layer at a region thereof arranged at the support structure.

7. The method according to claim 1 , further comprising:
producing a sealing structure at the main surface such that at least a portion of the support structure remains uncovered by the sealing structure and such that a third cavity is obtained at the support structure uncovered by the sealing structure and such that the emitting element is arranged between the cavity and the third cavity.

8. The method according to claim 7 , wherein producing the sealing structure comprises:
depositing a sacrificial material at the portion of the support structure;
depositing a sealing material of the sealing structure at the main surface and at the sacrificial material; and
removing the sacrificial material such that the third cavity is formed.

9. The method according to claim 8 , wherein depositing the sealing material comprises depositing an oxide material with a high density plasma process.

10. The method according to claim 7 , further comprising:
forming a connection between the cavity and the third cavity through the main surface adjacent to the support structure such that a thermal coupling between the support structure and the semiconductor substrate is reduced.

11. The method according to claim 7 , further comprising:
separating the support structure and the semiconductor substrate such that the support structure is mechanically fixed by a sealing material or by a sacrificial material and not fixed by the semiconductor substrate.

12. The method according to claim 1 , further comprising permanently reducing an atmospheric pressure in the cavity when compared to an ambient pressure of the semiconductor substrate.

13. The method according to claim 1 , further comprising subjecting the emitting element to an electric current.

14. A method for manufacturing an emitter, the method comprising:
providing a semiconductor substrate having a main surface and a cavity, adjacent to the main surface, formed by a silicon-on-nothing process or a Venezia process,
wherein a portion of the semiconductor substrate is arranged between the cavity and the main surface,
wherein the portion of the semiconductor substrate between the cavity and the main surface comprises semiconductor material;

forming a support structure from the portion of the semiconductor substrate arranged between the cavity and the main surface;
forming at least one trench at the main surface and extending to the cavity; and
arranging an emitting element on or over the support structure to emit a thermal radiation of the emitter,
the emitting element being arranged on a different side of the main surface as the support structure such that opposite sides of the support structure are between the emitting element and a portion of the cavity,
wherein the cavity reduces thermal coupling between the emitting element and the semiconductor substrate.

15. The method according to claim 14 , wherein providing the semiconductor substrate comprises:
forming the cavity such that the cavity is encapsulated by the semiconductor substrate and such that the semiconductor substrate and the support structure comprise a monocrystalline structure.

16. The method according to claim 14 , wherein the cavity is formed such that the support structure and the semiconductor substrate are connected by at least one pillar.

17. A method for manufacturing an emitter, comprising:
providing a semiconductor substrate,
wherein the semiconductor substrate includes a main surface and a cavity, adjacent to the main surface, formed by a silicon-on-nothing process or a Venezia process,
wherein a portion of the semiconductor substrate is between the cavity and the main surface,
wherein the portion of the semiconductor substrate between the cavity and the main surface comprises semiconductor material formed as an epitaxial growth;

forming a support structure from the portion of the semiconductor substrate between the cavity and the main surface;
forming at least one trench at the main surface and extending to the cavity; and
arranging an emitting element adjacent to the cavity,
wherein the emitting element is arranged on a different side of the main surface as the support structure such that opposite sides of the support structure are between the emitting element and a portion of the cavity,
wherein the emitting element is to emit a thermal radiation of the emitter, and
wherein the cavity reduces thermal coupling between the emitting element and the semiconductor substrate.

18. The method according to claim 17 , wherein arranging the emitting element comprises arranging the emitting element on an oxide layer formed on the support structure.

19. The method according to claim 18 , wherein arranging the emitting element comprises:
forming the oxide layer on the main surface of the semiconduct

Assignees

• Infineon Technologies Dresden Gmbh
• Infineon Tech Desden Gmbh

Inventors

• Bieselt Steffen
• Froehlich Heiko
• Kautzsch Thoralf
• Stegemann Maik
• Vogt Mirko

Classifications

• H01L49/00 Primary

  Electricity · mapped topic

• G01J3/00

  Spectrometry; Spectrophotometry; Monochromators; Measuring colours · CPC title

• G01J3/108 Primary

  for measurement in the infrared range · CPC title

• G01J3/42

  Absorption spectrometry; Double beam spectrometry; Flicker spectrometry; Reflection spectrometry (beam switching arrangements G01J3/08) · CPC title

• H10N99/00 Primary

  Subject matter not provided for in other groups of this subclass · CPC title