Semiconductor MEMS structure and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9828234-B2
Application number	US-201615142806-A
Country	US
Kind code	B2
Filing date	Apr 29, 2016
Priority date	Apr 29, 2016
Publication date	Nov 28, 2017
Grant date	Nov 28, 2017

Abstract

The present disclosure provides a method of manufacturing a structure. The method comprises: providing a first substrate; forming a plurality of conductive pads over the first substrate; forming a film on a first subset of the plurality of conductive pads, thereby leaving a second subset of the plurality of conductive pads exposed from the film; forming a self-assembled monolayer (SAM) over the film; and forming a cavity by the first substrate and a second substrate through bonding a portion of the second substrate to the second subset of the plurality of conductive pads that are exposed from the film.

First claim

What is claimed is:

1. A method of manufacturing a structure, the method comprising:
providing a first substrate;
forming a plurality of conductive pads over the first substrate;
forming a film on a first subset of the plurality of conductive pads thereby leaving a second subset of the plurality of conductive pads exposed from the film;
forming a self-assembled monolayer (SAM) over the film; and
forming a cavity by the first substrate and a second substrate through bonding a portion of the second substrate to the second subset of the plurality of conductive pads that are exposed from the film.

2. A method according to claim 1 , wherein the film is a silicon containing dielectric layer.

3. A method according to claim 1 , wherein forming a film on a first subset of the plurality of conductive pads further comprises forming the film on a sidewall of one of the first subset of the plurality of conductive pads.

4. A method according to claim 1 , wherein forming an SAM over the film comprises forming the SAM material on a top surface and a sidewall of the film.

5. A method according to claim 1 , wherein forming an SAM over the film comprises:
blanket depositing an SAM material over the first substrate and the film; and
annealing the first substrate, thereby exposing the second subset of the plurality of conductive pads from the film.

6. A method according to claim 1 , further comprising forming a movable membrane in the cavity.

7. A method according to claim 6 , further comprising forming an SAM material on a surface of the movable membrane.

8. A method according to claim 1 , wherein bonding a portion of the second substrate to a second subset of the conductive pads that are exposed from the film comprises performing a eutectic bonding between the portion and one of the second subset of the conductive pads.

9. A method according to claim 1 , wherein forming a film on a first subset of the plurality of conductive pads, thereby leaving a second subset of the plurality of conductive pads exposed from the film, comprises pattering the film to expose the second subset of the plurality of conductive pads.

10. A method of manufacturing a structure, the method comprising:
providing a first substrate;
forming a first conductive mesa and a second conductive mesa over the first substrate;
forming a silicon containing layer over the first conductive mesa, wherein after the forming the silicon containing layer over the first conductive mesa, a top surface of the second conductive mesa is free of the silicon containing layer;
bonding the first substrate to a second substrate, wherein the top surface of the second conductive mesa is bonded to an element of the second substrate; and
forming a cavity comprising a movable member proximal to the first substrate.

11. A method according to claim 10 , wherein forming a cavity comprises bonding the first substrate to the second substrate with the cavity formed therebetween, wherein the first conductive mesa is within the cavity.

12. A method according to claim 11 , wherein bonding the first substrate with the second substrate includes one of a compressive bonding and a eutectic bonding.

13. A method according to claim 10 , wherein forming the silicon containing layer over the first conductive mesa comprises forming a self-assembled monolayer.

14. A method according to claim 13 , wherein the self-assembled monolayer is a topmost layer of the silicon containing layer and faces the movable membrane.

15. A method according to claim 13 , further comprising:
coating the self-assembled monolayer over the first conductive mesa and a top surface of the first substrate; and
subjecting the first substrate and the first conductive mesa to a thermal process wherein during the thermal process the self-assembled monolayer is removed from the second conductive mesa and maintained over the first conductive mesa.

16. A method of fabricating a semiconductor device structure, the method comprising:
providing a first substrate having a mesa protruding from a surface of the first substrate;
depositing a seed layer over the mesa, wherein the seed layer is disposed over a top surface of the mesa;
forming an anti-stiction layer over the seed layer over the mesa;
bonding a second substrate to the first substrate thereby forming a cavity enclosed by the first substrate and the second substrate, the mesa disposed within the cavity; and
forming a movable membrane within the cavity.

17. The method of claim 16 , wherein the providing the first substrate includes providing a plurality of pads coplanar and spaced a distance from the mesa.

18. The method of claim 17 , wherein the seed layer is patterned such that the dielectric layer is not disposed over the plurality of pads.

19. The method of claim 18 , wherein forming the anti-stiction layer includes forming self-assembled monolayer over the dielectric layer, the mesa, and the plurality of pads.

20. The method of claim 18 , further comprising:
performing an annealing process after forming the anti-stiction layer, wherein the annealing process removes the anti-stiction layer from over the plurality of pads and maintains the anti-stiction layer over the seed layer over the mesa.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Hsieh Yuan-Chih
• Lin Hsing-Lien
• Peng Jung-Huei
• Wu Yi-Chien

Classifications

• B81B2201/0242

  Gyroscopes · CPC title

• B81C3/001

  Bonding of two components · CPC title

• B81B2203/04

  Electrodes · CPC title

• B81B7/02 Primary

  containing distinct electrical or optical devices of particular relevance for their function, e.g. microelectro-mechanical systems [MEMS] (B81B7/04 takes precedence) · CPC title

• B81B3/0005 Primary

  Anti-stiction coatings · CPC title