Display with surface mount emissive elements

Patent metadata

Field	Value
Publication number	US-9825202-B2
Application number	US-201715410001-A
Country	US
Kind code	B2
Filing date	Jan 19, 2017
Priority date	Oct 31, 2014
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

A surface mount emissive element is provided with a top surface and a bottom surface. A first electrical contact is formed exclusively on the top surface, and a second electrical contact is formed exclusively on the top surface. A post extends from the bottom surface. An emissive display is also provided made from surface mount emissive elements and an emissions substrate. The emissions substrate has a top surface with a first plurality of wells formed in the emissions substrate top surface. Each well has a bottom surface, sidewalls, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface. The emissions substrate also includes a matrix of column and row conductive traces forming a first plurality of column/row intersections, where each column/row intersection is associated with a corresponding well. A first plurality of emissive elements populates the wells.

First claim

The invention claimed is:

1. A surface mount emissive element comprising:
a top surface;
a bottom surface;
a first electrical contact formed exclusively on the top surface and configured as a ring;
a first semiconductor layer and a multiple quantum well (MQW) layer stack underlying the first electrical contact, in the shape of a ring;
a second electrical contact formed exclusively on the top surface within a first electrical contact ring perimeter;
a second semiconductor layer having a disk shape with a center portion underlying the second electrical contact; and,
a post in contact with, and extending from the bottom surface.

2. The surface mount emissive element of claim 1 wherein the surface mount element is a surface mount light emitting diode (SMLED) comprising:
the first semiconductor layer, with a dopant selected from a first group consisting of an n-dopant or a p-dopant;
the second semiconductor layer, with the unselected dopant from the first group; and,
the layer interposed between the first semiconductor layer and the second semiconductor layer.

3. The surface mount emissive element of claim 2 wherein the first semiconductor layer and second semiconductor layer are a material selected from the group consisting of gallium nitride (GaN) and aluminum gallium indium phosphide (AIGaInP).

4. The surface mount emissive element of claim further comprising:
a moat formed between the first electrical contact ring and the second electrical contact; and,
an electrical insulator filling the moat.

5. The surface mount emissive element of claim 1 wherein the top surface is planar; and,
wherein the bottom surface is planar.

6. The surface mount emissive element of claim 1 wherein the top surface is bi-planar with a first level and a second level;
wherein the first electrical contact is formed on the first level of the top surface; and,
wherein the second electrical contact is formed on the second level of the top surface.

7. The surface mount emissive element of claim 1 further comprising:
a plurality of posts extending from the bottom surface.

8. The surface mount emissive element of claim 1 wherein the first and second electrical contacts are solder-coated.

9. The surface mount emissive element of claim 1 wherein the post is an electrically nonconductive material.

10. An emissive display comprising:
an emissions substrate comprising:
a top surface;
a first plurality of wells formed in the emissions substrate top surface, each well comprising a bottom surface, sidewalls, a first electrical interface formed on the bottom surface, and a second electrical interface formed on the bottom surface;
a matrix of column and row conductive traces forming a first plurality of column/row intersections, where each column/row intersection is associated with a corresponding well;

a first plurality of surface mount emissive elements populating the wells, each emissive element comprising;
a top surface overlying a corresponding well bottom surface;
a bottom surface;
a first electrical contact formed on the top surface and connected to a corresponding well first electrical interface;
a second electrical contact formed on the top surface and connected to a corresponding well second electrical interface; and,
a post extending from the bottom surface.

11. The emissive display of claim 10 further comprising:
a color modifier overlying each emissive element bottom surface; and,
a liquid crystal display (LCD) substrate overlying the color modifier.

12. The emissive display of claim 10 wherein the emissive elements are surface mount light emitting diodes (SMLEDs), each SMLED comprising:
a first semiconductor layer, with a dopant selected from a first group consisting of an n-dopant or a p-dopant;
a second semiconductor layer, with the unselected dopant from the first group; and,
a multiple quantum well (MQW) layer interposed between the first semiconductor layer and the second semiconductor layer.

13. The emissive display of claim 12 wherein the first and second semiconductor layers are selected from the group consisting of gallium nitride (GaN) and aluminum gallium indium phosphide (AIGaInP).

14. The emissive display of claim 13 further comprising:
a second plurality of first color modifiers overlying the bottom surfaces of a corresponding second plurality of SMLEDs, where the second plurality is less than the first plurality;
a second plurality of second color modifiers overlying the bottom surfaces of a corresponding second plurality of SMLEDs, where the second color is different than the first color.

15. The emissive display of claim 14 further comprising:
a second plurality of light diffusers overlying the bottom surfaces of a corresponding second plurality of SMLEDs with no overlying color modifier.

16. The emissive display of claim 15 further comprising:
a second plurality of pixel regions, each pixel region comprising a SMLED with an overlying first color modifier, a SMLED with an overlying second color modifier, and a SMLED with no overlying color modifier; and,
wherein the first color is green, the second color is red, and wherein the SMLED with no overlying color modifier emits a blue light.

17. The emissive display of claim 13 further comprising:
a second plurality of red color modifiers overlying the bottom surfaces of a corresponding second plurality of SMLEDs, where the second plurality is less than the first plurality;
a third plurality of light diffusers overlying the bottom surfaces of a corresponding third plurality of SMLEDs with no overlying color modifier, where the third plurality is less than the first plurality and equal to twice the second plurality; and,
a second plurality of pixel regions, each pixel region comprising a SMLED with an overlying red color modifier, a blue color SMLED with no overlying color modifier, and a green color SMLED with no color modifier.

18. The emissive display of claim 12 wherein the first electrical contact of each SMLED is configured as a ring with a first diameter;
wherein the first semiconductor layer and MQW layer of each SMLED are a stack overlying the first electrical contact, in the shape of a ring;
wherein the second electrical contact of each SMLED is formed within a first electrical contact ring perimeter;
wherein the second semiconductor layer of each SMLED has a disk shape with a center portion overlying the second electrical contact;
wherein each well first electrical interface is configured as a partial ring with the first diameter, and having a mouth opening; and,
wherein each well second electrical interface is configured as a trace extending into the mouth of a corresponding first electrical interface partial ring.

19. The emissive display of claim 12 wherein the second electrical contact of each SMLED is configured as a ring with a first diameter;
wherein the second semiconductor layer of each SMLED has a disk shape with a perimeter overlying the second electrical contact ring;
wherein the first electrical contact of each SMLED is formed within a second electrical contact ring perimeter;
wherein the first semiconductor layer and MQW layer of each SMLED are a stack overlying the first electrical contact;
wherein each well second electrical interface is configured as a partial ring with the first diameter, and having a mouth opening; and,
wherein each well first electrical interface is configured as a trace extending into the mouth of a corresponding second electrical interface partial ring.

Assignees

• Elux Inc
• Elux Inc

Inventors

• Schuele Paul J
• Sasaki Kenji
• Ulmer Kurt
• Lee Jong-Jan

Classifications

• H10W90/00 Primary

  Package configurations · CPC title

• H01L27/1214

  Electricity · mapped topic

• H01L33/30

  Electricity · mapped topic

• H01L25/167

  Electricity · mapped topic

• H01L33/20

  Electricity · mapped topic