Electronic device based on multilayer thin film and method for manufacturing the same using a three-dimensional structure
US-2024309503-A1 · Sep 19, 2024 · US
US9825118B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9825118-B2 |
| Application number | US-201615071725-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 16, 2016 |
| Priority date | Jul 18, 2013 |
| Publication date | Nov 21, 2017 |
| Grant date | Nov 21, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A high voltage metal-oxide-metal (HV-MOM) layout includes a first conductive element. The first element includes a first leg extending in a first direction, a second leg connected to the first leg, the second leg extending in a second direction different from the first direction, and a third leg connected to the second leg, the third leg extending in a first direction. The HV-MOM layout further includes a second conductive element separated from the first conductive element by a space. The second conductive element includes a serpentine structure, wherein the serpentine structure is enclosed on at least three sides by the first conductive element. The HV-MOM layout further includes a dielectric material filling the space between the first conductive element and the second conductive element.
Opening claim text (preview).
What is claimed is: 1. A high voltage metal-oxide-metal (HV-MOM) layout comprising: a first conductive element comprising: a first leg extending in a first direction; a second leg connected to the first leg, the second leg extending in a second direction different from the first direction; a third leg connected to the second leg, the third leg extending in a first direction, and a first contact leg extending from the first leg in the second direction, wherein the first contact leg is configured to receive a first signal; a second conductive element separated from the first conductive element by a space, the second conductive element comprising: a serpentine structure, wherein the serpentine structure is enclosed on at least three sides by the first conductive element, and a second contact leg configured to receive a voltage signal, the second contact leg configured to transfer the voltage signal directly to the serpentine structure; and a dielectric material filling the space between the first conductive element and the second conductive element. 2. The HV-MOM layout of claim 1 , wherein the first conductive element further comprises: a first plurality of branches extending from the first leg in the second direction toward the third leg; and a second plurality of branches extending from the third leg in the second direction toward the first leg, wherein the serpentine structure is interlaced with the first plurality of branches and the second plurality of branches in an alternating fashion. 3. The HV-MOM of claim 1 , wherein the second leg comprises an upper second leg connected to a first end of the first leg and a lower second leg connected to a second end of the first leg opposite the first end of the first leg. 4. The HV-MOM layout of claim 3 , wherein the third leg comprises an upper third leg connected to the upper second leg, a lower third leg connected to the lower second leg, and the upper third leg is not continuous with the lower third leg. 5. A high voltage metal-oxide-metal (HV-MOM) layout comprising: a first conductive element comprising: a first leg extending in a first direction; a second leg connected to the first leg, the second leg extending in a second direction different from the first direction; a third leg connected to the second leg, the third leg extending in a first direction, and a first contact leg extending from the first leg in the second direction, wherein the first contact leg is configured to receive a first signal; a second conductive element separated from the first conductive element by a space, the second conductive element comprising: a serpentine structure, wherein the serpentine structure is enclosed on at least three sides by the first conductive element a second contact leg configured to receive a voltage signal, and at least one additional leg configured to transfer the voltage signal from the second contact leg to the serpentine structure; and a dielectric material filling the space between the first conductive element and the second conductive element. 6. The HV-MOM layout of claim 5 , wherein the first conductive element further comprises: a first plurality of branches extending from the first leg in the second direction toward the third leg; and a second plurality of branches extending from the third leg in the second direction toward the first leg, wherein the serpentine structure is interlaced with the first plurality of branches and the second plurality of branches in an alternating fashion. 7. A method of making a high voltage metal-oxide-metal (HV-MOM) device, the method comprising: implanting a deep well in a substrate; implanting at least one high voltage well in the substrate over the deep well, wherein an uppermost surface of the deep well is below an uppermost surface of the at least one high voltage well; depositing a dielectric layer over each high voltage well of the at least one high voltage well; forming a gate structure over the dielectric layer; depositing an inter-layer dielectric (ILD) layer over the substrate, the ILD layer surrounding the gate structure; depositing a first inter-metal dielectric (IMD) layer over the ILD layer; and depositing a first metal feature in the first IMD layer, wherein the first metal feature is part of a MOM capacitor. 8. The method of claim 7 , further comprising forming at least one isolation feature in the substrate, wherein forming the at least one high voltage well comprises forming a plurality of high voltage wells and forming the at least one isolation feature comprises forming the at least one isolation feature between adjacent high voltage wells of the plurality of high voltage wells. 9. The method of claim 8 , wherein depositing the dielectric layer comprises forming the dielectric layer over each isolation feature of the at least one isolation feature, and a portion of the dielectric layer over each isolation feature of the at least one isolation feature is in contact with the ILD layer. 10. The method of claim 8 , wherein forming the at least one isolation feature comprises forming the at least one isolation feature having a same height as the at least one high voltage well. 11. The method of claim 7 , further comprising implanting at least one heavily doped region in the at least one high voltage well, wherein a dopant concentration of the heavily doped region is greater than a dopant concentration of the at least one high voltage well. 12. The method of claim 7 , further comprising depositing a second metal feature over the ILD layer, wherein the second metal feature is separated from the first metal feature by a space, the second metal feature has a serpentine structure, and the serpentine structure is enclosed on at least three sides by the first metal feature. 13. The method of claim 12 , wherein depositing the second metal feature comprises depositing the second metal feature in the first 1 MB layer. 14. The method of claim 12 , wherein depositing the second metal feature comprises depositing the second metal feature over the first 1 MB layer. 15. A high voltage metal-oxide-metal (HV-MOM) device comprising: a substrate; a deep well in the substrate; at least one high voltage well in the substrate over the deep well; a dielectric layer over the at least one high voltage well; a gate structure over the dielectric layer; an inter-layer dielectric (ILD) layer over the substrate, the ILD layer surrounding the gate structure; a first conductive feature over the ILD layer, wherein the first conductive feature is part of a MOM capacitor, and the first conductive feature comprises: a first leg extending in a first direction; a second leg connected to the first leg, the second leg extending in a second direction different from the first direction; and a third leg connected to the second leg, the third leg extending in a first direction; a second conductive feature over the ILD layer, wherein the second conductive feature is separated from the first conductive feature by a space, the second conductive feature has a serpentine structure, and the serpentine structure is enclosed on at least three sides by the first conductive feature; and a dielectric material filling the space between the first conductive feature and the second conductive feature, wherein the dielectric layer is a continuous dielectric layer over each high voltage well of the at least one high voltage well. 16. The HV-MOM of claim 15 , further comprising a plurality of isolation regions over the deep well, wherein a first high voltage well of the at least one high volta
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Combinations of field-effect devices and one or more diodes, capacitors or resistors · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.