Method for correcting wafer bow from overlay

Patent metadata

Field	Value
Publication number	US-9824894-B2
Application number	US-201514682242-A
Country	US
Kind code	B2
Filing date	Apr 9, 2015
Priority date	Apr 9, 2014
Publication date	Nov 21, 2017
Grant date	Nov 21, 2017

Abstract

Described herein are methods for flattening a substrate, such as a semiconductor wafer, to reduce bowing in such substrates. Methods include treating or bombarding a backside surface of a substrate with particles of varying doses, densities, and spatial locations. Particle bombardment and selection is such that the substrate becomes more planar by selectively increasing or decreasing z-height points to reduce overall deflection. One or more tensile or compressive films can be added to the backside surface to be selectively relaxed at specific point locations. Such methods can correct bowing in substrates resulting from various fabrication processes such as thermal annealing.

First claim

The invention claimed is:

1. A method for flattening a substrate, the method comprising:
receiving a substrate, the substrate having multiple semiconductor structures that are at least partially fabricated on a top surface of the substrate, the substrate having a backside surface that is non-planar, the backside surface being non-planar as a result of fabrication of the multiple semiconductor structures, the backside surface being opposite the top surface;
identifying at least first and second deflection areas on the backside surface of the substrate; and
directing matter particles to strike the backside surface of the substrate according to a first bombardment characteristic at the first deflection area and a second bombardment characteristic different from the first bombardment characteristic at the second deflection area on the backside surface of the substrate.

2. The method of claim 1 , wherein identifying the at least first and second deflection areas includes creating a deflection signature of the substrate, the deflection signature identifying the at least first and second deflection areas on the backside surface.

3. The method of claim 2 , wherein the deflection signature maps relative differences in height by lateral location on the substrate.

4. The method of claim 2 , wherein directing matter particles includes varying an amount of matter particles directed at a given spatial location of the backside surface based on the deflection signature.

5. The method of claim 1 , wherein identifying the at least first and second deflection areas includes measuring substrate bow.

6. The method of claim 1 , wherein directing matter particles includes varying matter particle parameters based on type of deflection being corrected.

7. The method of claim 6 , wherein directing matter particles includes:
directing lattice-expansion causing matter particles at areas on the backside surface identified as having a concavity; and
directing lattice-contraction causing matter particles at areas on the backside surface identified as having a convexity.

8. The method of claim 1 , wherein directing matter particles includes directing matter particles via a gas cluster ion beam.

9. The method of claim 1 , wherein directing matter particles includes directing matter particles selected from the group consisting of ions, molecules, atoms, atom clusters, and molecule clusters.

10. The method of claim 1 , wherein directing matter particles includes executing ion bombardment of the backside surface.

11. The method of claim 1 , wherein directing matter particles includes directing matter particles using a gas cluster ion beam system.

12. The method of claim 1 , wherein the substrate includes at least one patterned layer having been patterned by photolithography and etched into an underlying layer.

13. The method of claim 1 , wherein the substrate is a silicon wafer.

14. The method of claim 13 , wherein the silicon wafer is a semiconductor grade wafer.

15. The method of claim 6 , wherein varying matter particle parameters includes selecting particle size and energy.

16. The method of claim 15 , wherein selecting matter particle size and energy for a given spatial location on the backside surface is based on a deflection signature.

17. A method for flattening a substrate, the method comprising:
receiving a substrate, the substrate having multiple semiconductor structures that are at least partially fabricated on a top surface of the substrate, the substrate being initially planar prior to fabrication of the multiple semiconductor structures, the substrate having a backside surface that is non-planar, the backside surface being non-planar as a result of fabrication of the multiple semiconductor structures, the backside surface being opposite the top surface;
identifying at least first and second areas of convexity or concavity on the backside surface of the substrate that defines an overlay signature; and
directing matter particles to strike the backside surface of the substrate according to a first bombardment characteristic at the first area of convexity or concavity a second bombardment characteristic different from the first bombardment characteristic at the second area of convexity or concavity on the backside surface of the substrate based on the overlay signature on the backside surface of the substrate, the matter particles causing either surface expansion or surface contraction such that the backside surface becomes planar.

18. The method of claim 17 , wherein the backside surface becoming planar includes reducing areas of convexity or concavity such that z-height variations in the back side surface are less than about 20 nanometers.

19. A method for flattening a substrate, the method comprising:
receiving a substrate, the substrate having a backside surface that is non-planar, the backside surface being opposite the top surface, the top surface being a working surface on which structures are formed;
identifying at least first and second deflection areas on the backside surface of the substrate; and
implanting matter particles in the backside surface of the substrate according to a first implant characteristic at the first deflection area and a second implant characteristic different from the first implant characteristic at the second deflection area on the backside surface of the substrate such that deflection areas are reduced in an amount of deflection.

Assignees

• Tokyo Electron Ltd

Inventors

• Devilliers Anton J

Classifications

• H10P74/203

  Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

• H10P74/23

  characterised by multiple measurements, corrections, marking or sorting processes · CPC title

• H10P50/00

  Etching of wafers, substrates or parts of devices · CPC title

• H10P30/20 Primary

  into semiconductor materials, e.g. for doping · CPC title

• H10P30/225 Primary

  of a molecular ion, e.g. decaborane · CPC title