Internal voltage monitoring for integrated circuit devices

Patent metadata

Field	Value
Publication number	US-9804207-B1
Application number	US-201615058014-A
Country	US
Kind code	B1
Filing date	Mar 1, 2016
Priority date	Mar 1, 2016
Publication date	Oct 31, 2017
Grant date	Oct 31, 2017

Abstract

An integrated circuit (IC) is located on an IC chip and includes an integrated voltage regulator circuit that provides an internal supply voltage to the IC. A test mode signal can be received from an external pin of the IC chip. In response to the test mode signal, the IC can enter a test mode where the internal supply voltage is provided to components of the IC. Also in the test mode, voltage characteristics of the internal supply voltage are measured to produce an analog held value. The measurements occur in an analog domain and over a plurality of sample-and-hold windows. Upon completion of a measurement window, the analog held is converted to a digital value. The digital value is then stored in a memory circuit. The digital value is provided from the memory circuit to a reader device external to the IC.

First claim

What is claimed is:

1. A method for testing an integrated circuit (IC) located on an IC chip and that includes an integrated voltage regulator circuit that provides an internal supply voltage to the IC, the method comprising:
receiving a test mode signal from an external pin of the IC chip;
entering, in response to the test mode signal, a test mode;
in the test mode:
providing the internal supply voltage to components of the IC;
measuring, in an analog domain and over a plurality of sample-and-hold windows that are part of a measurement window, a voltage characteristic of the internal supply voltage to produce an analog held value;
converting, upon completion of the measurement window, the analog held value to a digital value;
storing the digital value in a memory circuit of the IC; and
providing the digital values from the memory circuit to a reader device external to the IC.

2. The method of claim 1 , wherein each of the sample-and-hold windows have a resolution of 1 nanosecond or less.

3. The method of claim 1 , wherein the analog held value represents a voltage characteristic that is selected from the group consisting of a minimum voltage of the internal supply voltage, a peak voltage of the internal supply voltage, and an average voltage of the internal supply voltage.

4. The method of claim 1 , wherein the IC includes programmable logic.

5. The method of claim 1 , further comprising trimming, in response to the stored digital value in the memory circuit, values for components that result in a modification to operational characteristics of the integrated voltage regulator circuit.

6. The method of claim 5 , wherein the components include resistive and capacitive components.

7. The method of claim 5 , further comprising blowing fuses to fix the values for the components.

8. The method of claim 1 , wherein the measuring voltage characteristics of the internal supply voltage includes:
using a comparator circuit to compare a measured value from a current sample-and-hold window to a measured value from a prior sample-and-hold window, and
replacing, in response to the comparison, the value from the prior sample-and-hold window with the value from the current sample-and-hold window.

9. The method of claim 1 , further comprising iteratively repeating the measuring and converting, and wherein, during each iteration, values for components within the IC are trimmed to modify to operational characteristics of the integrated voltage regulator circuit.

10. A system comprising:
an integrated circuit (IC) chip that includes:
an integrated voltage regulator circuit that is configured to provide an internal supply voltage to the IC chip;
a test control interface that is configured to:
receive a test mode signal from an external pin of the IC chip; and
write, in response to the test mode signal, a value to a test mode register;

an analog to digital converter (ADC) circuit that, in response to the value written to the test mode register, is configured to:
measure, in an analog domain and over a plurality of sample-and-hold windows that are part of a measurement window, voltage characteristics of the internal supply voltage to produce an analog held value; and
convert, upon completion of the measurement window, the analog held value to a digital value; and

a memory circuit and memory interface circuit that are configured to:
store the digital value in the memory circuit; and
provide the digital value from the memory circuit to a reader device external to the IC chip.

11. The system of claim 10 , wherein the sample-and-hold windows have a resolution of one nanosecond or less.

12. The system of claim 10 , wherein the held value represents a voltage characteristic that is selected from the group consisting of a minimum voltage of the internal supply voltage, a peak voltage of the internal supply voltage, and an average voltage of the internal supply voltage.

13. The system of claim 10 , wherein the IC chip includes programmable logic.

14. The system of claim 10 , wherein the IC chip is further configured to trim, in response to the digital value in the memory circuit, values for components that result in a modification to operational characteristics of the integrated voltage regulator circuit.

15. The system of claim 14 , wherein the components include resistive and capacitive components.

16. The system of claim 14 , wherein the IC chip includes fuses that are designed to fix the values for components.

17. The system of claim 10 , further comprising a multiplexer that is configured to select between different inputs to the ADC circuit.

18. The system of claim 17 , wherein the different inputs to the ADC circuit include another internal supply voltage provided by another integrated voltage regulator circuit of the IC chip.

19. The system of claim 18 , wherein the different inputs to the ADC circuit include external pins of the IC chip.

20. A system comprising:
an integrated circuit (IC) chip that includes:
an integrated voltage regulator circuit that is configured to provide an internal supply voltage to the IC chip;
a test control interface that is configured to:
receive a test mode signal from an external pin of the IC chip; and
write, in response to the test mode signal, a value to a test mode register;

an analog to digital converter (ADC) circuit that, in response to the value written to the test mode register, is configured to:
detect a peak voltage of the internal supply voltage;
detect a minimum voltage of the internal supply voltage; and
determine an average voltage of the internal supply voltage; and

a memory circuit and memory interface circuit that are configured to:
store values representing the determined peak voltage, minimum voltage, and average voltage; and
provide the stored voltages from the memory circuit to a reader device external to the IC chip.

Assignees

• Xilinx Inc

Inventors

• Lesea Austin H

Classifications

• G01R31/2832

  Specific tests of electronic circuits not provided for elsewhere (G01R31/2801, G01R31/316 take precedence) · CPC title

• G01R19/252 Primary

  using analogue/digital converters of the type with conversion of voltage or current into frequency and measuring of this frequency · CPC title

• G01R19/2509 Primary

  Details concerning sampling, digitizing or waveform capturing · CPC title

• G01R31/2879

  related to electrical aspects, e.g. to voltage or current supply or stimuli or to electrical loads · CPC title