Digital protective relay

US9755656B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9755656-B2
Application numberUS-201615003728-A
CountryUS
Kind codeB2
Filing dateJan 21, 2016
Priority dateFeb 6, 2015
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present disclosure relates to provide an active erroneous sample elimination device or erroneous sample elimination method for a relay capable of correctly implementing erroneous sample elimination processing even during a plurality of electrical disturbances mixed with an electrical quantity detection signal, and a digital protective relay according to the present disclosure may include a converter that samples an analog signal and converts the sampled signal to a digital signal; and a processor that searches an inflection point at which an electrical variation quantity varies from an increase to a decrease or from a decrease to an increase based on the digital signal, and compares an electrical variation quantity prior to and subsequent to the inflection point with a preset electrical quantity.

First claim

Opening claim text (preview).

What is claimed is: 1. A digital protective relay, comprising: a converter configured to sample an analog signal and convert the sampled analog signal to a digital signal; and a processor configured to: search an inflection point at which an electrical variation quantity varies from an increase to a decrease or from a decrease to an increase based on the digital signal, wherein the electrical variation quantity comprises at least one of current variation amount or voltage variation amount; compare the electrical variation quantity prior to and subsequent to the inflection point with a preset electrical quantity; and substitute electrical quantity data at the inflection point with electrical quantity data prior to a predetermined period when the digital signal is determined as an electrical disturbance. 2. The digital protective relay of claim 1 , wherein the processor is further configured to: perform a Discrete Time Fourier Transform on the digital signal for a predetermined period of time; compare a first convergence value at which a transformed value is increased and then converged with a predetermined normal convergence value; determine the digital signal as a harmonic wave when a difference between the first convergence value and the predetermined normal convergence value exceeds a predetermined difference; and determine the digital signal as the electrical disturbance when the electrical variation quantity is larger or equal to a reference electrical variation quantity. 3. The digital protective relay of claim 2 , wherein the processor is further configured to perform a root mean square processing on the digital signal when the digital signal is determined as the harmonic wave. 4. A noise elimination method for a digital relay, the method comprising: sampling an analog signal of an electrical quantity detection signal and converting the sampled analog signal to a digital signal; searching an inflection point at which an electrical variation quantity varies from an increase to a decrease or from a decrease to an increase based on the digital signal by a processor, wherein the electrical variation quantity comprises at least one of current variation amount or voltage variation amount; comparing the electrical variation quantity prior to and subsequent to the inflection point with a predetermined normal reference electrical variation quantity by the processor; and substituting an electrical quantity data at the inflection point with an electrical quantity data prior to a predetermined period by the processor when the digital signal is determined as an electrical disturbance where an electrical variation quantity prior to and subsequent to the inflection point is not less than a predetermined normal reference electrical variation quantity. 5. The method of claim 4 , further comprising: performing a Discrete Time Fourier Transform on the digital signal for a predetermined period of time; comparing a first convergence value at which a transformed value is increased and then converged with a predetermined normal convergence value; determining that a harmonic wave is mixed with an electrical quantity detection signal to perform root mean square processing on the digital signal when a difference between the first convergence value and the normal convergence value exceeds a predetermined difference.

Assignees

Inventors

Classifications

  • Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections (testing of sparking plugs H01T13/58) · CPC title

  • Details concerning sampling, digitizing or waveform capturing · CPC title

  • using analogue/digital converters of the type with conversion of voltage or current into frequency and measuring of this frequency · CPC title

  • Arrangements for preventing response to transient abnormal conditions, e.g. to lightning {or to short duration over voltage or oscillations; Damping the influence of DC component by short circuits in AC networks} · CPC title

  • H02H7/262Primary

    involving transmissions of switching or blocking orders · CPC title

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Frequently asked questions

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What does patent US9755656B2 cover?
The present disclosure relates to provide an active erroneous sample elimination device or erroneous sample elimination method for a relay capable of correctly implementing erroneous sample elimination processing even during a plurality of electrical disturbances mixed with an electrical quantity detection signal, and a digital protective relay according to the present disclosure may include a …
Who is the assignee on this patent?
Lsis Co Ltd
What technology area does this patent fall under?
Primary CPC classification H02H7/262. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).