A/D converter, analog front end, and sensor system

Patent metadata

Field	Value
Publication number	US-9625500-B2
Application number	US-201615244353-A
Country	US
Kind code	B2
Filing date	Aug 23, 2016
Priority date	Aug 24, 2015
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

An A/D converter has an analog input terminal, an analog output terminal, a digital output terminal, a first resistance comprising one end connected to the analog input terminal or a reference voltage line and another end connected to a first node, a second resistance comprising one end connected to the first node and another end connected to the analog output terminal, an operational amplifier comprising a first input terminal connected to the first node, a second input terminal connected to the reference voltage line or the analog input terminal, and an output terminal connected to the analog output terminal, a quantizer comprising an input terminal connected to the analog input terminal and an output terminal connected to the digital output terminal, and a DA converter comprising an input terminal connected to the digital output terminal and an output terminal connected to the first node.

First claim

The invention claimed is:

1. An A/D converter comprising:
an analog input terminal to input an analog input signal;
an analog output terminal to output an analog output signal;
a digital output terminal to output a digital output signal;
a first resistance comprising one end connected to the analog input terminal or a reference voltage line and another end connected to a first node;
a second resistance comprising one end connected to the first node and another end connected to the analog output terminal;
an operational amplifier comprising a first input terminal connected to the first node, a second input terminal connected to the reference voltage line or the analog input terminal, and an output terminal connected to the analog output terminal;
a quantizer comprising an input terminal connected to the analog input terminal and an output terminal connected to the digital output terminal; and
a DA converter comprising an input terminal connected to the digital output terminal and an output terminal connected to the first node.

2. The A/D converter of claim 1 , wherein the digital output signal has a redundant bit.

3. The A/D converter of claim 1 , wherein the quantizer has a resolution of 1.5 bits, 2.5 bits, or 3.5 bits.

4. The A/D converter of claim 1 , wherein at least one of the first resistance and the second resistance has a variable resistance value.

5. The A/D converter of claim 1 , further comprising a capacitor comprising one end connected to the analog output terminal and another end connected to a reference voltage line.

6. An analog front end comprising:
an A/D converter;
a post-stage A/D converter connected to a post-stage of the A/D converter; and
a switch connected between the A/D converter and the post-stage A/D converter,
wherein the A/D converter comprises:
an analog input terminal to input an analog input signal;
an analog output terminal to output an analog output signal;
a digital output terminal to output a digital output signal;
a first resistance comprising one end connected to the analog input terminal or a reference voltage line and another end connected to a first node;
a second resistance comprising one end connected to the first node and another end connected to the analog output terminal;
an operational amplifier comprising a first input terminal connected to the first node, a second input terminal connected to the reference voltage line or the analog input terminal, and an output terminal connected to the analog output terminal;
a quantizer comprising an input terminal connected to the analog input terminal and an output terminal connected to the digital output terminal; and
a DA converter comprising an input terminal connected to the digital output terminal and an output terminal connected to the first node.

7. The analog front end of claim 6 , wherein the analog front end comprises a plurality of the A/D converters connected in cascade.

8. The analog front end of claim 6 , wherein the A/D converter functions as at least one of a variable gain amplifier, a buffer, and a filter.

9. The analog front end of claim 6 , further comprising a generator circuit to generate a control signal which makes it impossible to switch a digital signal outputted by the quantizer during a predetermined period including a moment when the switch is turned on.

10. The analog front end of claim 9 , wherein the predetermined period is longer than a settling time of the analog output signal.

11. The analog front end of claim 9 , wherein the digital output signal has a redundant bit.

12. The analog front end of claim 9 , wherein the quantizer has a resolution of 1.5 bits, 2.5 bits, or 3.5 bits.

13. The analog front end of claim 9 , wherein at least one of the first resistance and the second resistance has a variable resistance value.

14. The analog front end of claim 9 , further comprising a capacitor comprising one end connected to the analog output terminal and another end connected to a reference voltage line.

15. A sensor system comprising:
a sensor to output an analog signal; and
an analog front end,
wherein the analog front end comprises:
an A/D converter;
a post-stage A/D converter connected to a post-stage of the A/D converter; and
a switch connected between the A/D converter and the post-stage A/D converter,
the A/D converter comprises:
an analog input terminal to input an analog input signal;
an analog output terminal to output an analog output signal;
a digital output terminal to output a digital output signal;
a first resistance comprising one end connected to the analog input terminal or a reference voltage line and another end connected to a first node;
a second resistance comprising one end connected to the first node and another end connected to the analog output terminal;
an operational amplifier comprising a first input terminal connected to the first node, a second input terminal connected to the reference voltage line or the analog input terminal, and an output terminal connected to the analog output terminal;
a quantizer comprising an input terminal connected to the analog input terminal and an output terminal connected to the digital output terminal; and
a DA converter comprising an input terminal connected to the digital output terminal and an output terminal connected to the first node, and
the analog signal outputted by the sensor is inputted into the analog front end as an analog input signal.

16. The sensor system of claim 15 , wherein the digital output signal has a redundant bit.

17. The sensor system of claim 15 , wherein the quantizer has a resolution of 1.5 bits, 2.5 bits, or 3.5 bits.

18. The sensor system of claim 15 , wherein at least one of the first resistance and the second resistance has a variable resistance value.

19. The sensor system of claim 15 , further comprising a capacitor comprising one end connected to the analog output terminal and another end connected to a reference voltage line.

Assignees

• Toshiba Kk

Inventors

• Yoshioka Kentaro
• Itakura Tetsuro
• Furuta Masanori

Classifications

• G01R19/252 Primary

  using analogue/digital converters of the type with conversion of voltage or current into frequency and measuring of this frequency · CPC title

• H03M1/46 Primary

  with digital/analogue converter for supplying reference values to converter · CPC title

• H03M1/164 Primary

  the steps being performed sequentially in series-connected stages (H03M1/161 takes precedence) · CPC title

• H03M1/1245

  Details of sampling arrangements or methods · CPC title

• H03M1/0695

  using less than the maximum number of output states per stage or step, e.g. 1.5 per stage or less than 1.5 bit per stage type · CPC title