Heterogeneous metallization using solid diffusion removal of metal interconnects

US9793206B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9793206-B1
Application numberUS-201615280518-A
CountryUS
Kind codeB1
Filing dateSep 29, 2016
Priority dateSep 29, 2016
Publication dateOct 17, 2017
Grant dateOct 17, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for forming trenches of an interconnect network in a substrate. The method includes forming a first trench in the substrate, which has a first width. The method also includes forming a second trench in the substrate, which has a second width that is greater than the first width. The method also includes depositing a metal layer into the trenches, applying a dielectric over the metal, and diffusing metal atoms from the trenches to the dielectric. The dielectric absorbs a majority of the metal atoms from the first trench while simultaneously absorbing only a minority of metal atoms from the second trench.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for forming trenches of an interconnect network in a substrate, the method comprising: forming a first trench of the trenches in the substrate, wherein the first trench comprises a first width dimension; forming a second trench of the trenches in the substrate, wherein the second trench comprises a second width dimension that is greater than the first width dimension; depositing a first metal layer into the first trench and the second trench; applying a dielectric layer over the first metal layer; and diffusing first metal atoms of the first metal layer from each of the first trench and the second trench to the dielectric layer, wherein the dielectric layer absorbs the first metal atoms from the first trench leaving the first trench devoid of significantly all of the first metal atoms while simultaneously absorbing only a minority of the first metal atoms from the second trench. 2. The method of claim 1 , wherein the first width dimension is less than 30 nm. 3. The method of claim 1 , wherein the second width dimension is greater than 30 nm. 4. The method of claim 1 , wherein the first trench and the second trench are formed at the same layer or level. 5. The method of claim 1 , further comprising: removing the dielectric layer, including the diffused first metal atoms contained within the dielectric layer; depositing a second metal layer into the first trench and the second trench; and applying a protective layer over the first trench and the second trench. 6. The method of claim 1 , wherein the first metal layer comprises: copper or a copper alloy; or a metal including silver, gold, aluminum, rhodium, iridium, tungsten, molybdenum, cobalt, nickel, or ruthenium; or a metal silicide including tungsten silicide, titanium silicide, nickel silicide, or cobalt silicide. 7. The method of claim 5 , wherein the second metal layer comprises: a metal including silver, gold, aluminum, rhodium, iridium, tungsten, molybdenum, cobalt, nickel, or ruthenium; or a metal silicide including tungsten silicide, titanium silicide, nickel silicide, or cobalt silicide. 8. The method of claim 1 , further comprising annealing the dielectric layer after applying the dielectric layer to accelerate the diffusion process and to increase efficiency of diffusing the first metal atoms from the first trench and the second trench to the dielectric layer. 9. The method of claim 1 , wherein the dielectric layer comprises an oxide or amorphous carbon. 10. The method of claim 1 , further comprising planarizing a surface of the substrate after depositing a second metal layer to remove any second metal overburden.

Assignees

Inventors

Classifications

  • the principal metal being a transition metal · CPC title

  • Interconnections with multiple fill metals, e.g. having different metals in wide and narrow interconnections, or having different metals in vias and in trenches · CPC title

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • the principal metal being a refractory metal · CPC title

  • the principal metal being a noble metal, e.g. gold · CPC title

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What does patent US9793206B1 cover?
A method for forming trenches of an interconnect network in a substrate. The method includes forming a first trench in the substrate, which has a first width. The method also includes forming a second trench in the substrate, which has a second width that is greater than the first width. The method also includes depositing a metal layer into the trenches, applying a dielectric over the metal, a…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification H10W20/056. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 17 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).