Preventing unauthorized use of integrated circuits for radiation-hard applications
US-2016315056-A1 · Oct 27, 2016 · US
Leakage-free implantation-free ETSOI transistors
US9768254B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9768254-B2 |
| Application number | US-201514814064-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 30, 2015 |
| Priority date | Jul 30, 2015 |
| Publication date | Sep 19, 2017 |
| Grant date | Sep 19, 2017 |
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Abstract
Official abstract text for this publication.
A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween. A device channel is formed in the thin semiconductor layer. Source and drain regions are formed at opposing positions relative to the device channel. The source and drain regions include an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer. A gate structure is formed over the device channel.
First claim
Opening claim text (preview).
The invention claimed is: 1. A semiconductor device, comprising: an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween; a device channel formed in the thin semiconductor layer; source and drain regions formed at opposing positions relative to the device channel, the source and drain regions including an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer, wherein the n-type material includes ZnO; and a gate structure formed over the device channel. 2. The semiconductor device as recited in claim 1 , wherein the ZnO is Al-doped. 3. The semiconductor device as recited in claim 1 , wherein the source and drain regions are formed to a substantially same thickness as the thin semiconductor layer. 4. The semiconductor device as recited in claim 1 , wherein the device channel includes material comprising the thin semiconductor layer. 5. A semiconductor device, comprising: an extremely thin semiconductor-on-insulator (ETSOI) substrate having a base substrate, a thin semiconductor layer and a buried dielectric therebetween; a device channel patterned in the thin semiconductor layer; openings formed through the thin semiconductor layer to the buried dielectric; an aluminum doped zinc oxide material deposited on the buried dielectric within the openings and forming source and drain regions within the openings at opposing positions relative to the device channel; and a gate structure formed over the device channel. 6. The semiconductor device as recited in claim 5 , wherein the source and drain regions are formed to a substantially same thickness as the thin semiconductor layer. 7. The semiconductor device as recited in claim 5 , wherein the n-type material includes an amorphous phase. 8. A semiconductor device, comprising: an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween; a device channel formed in the thin semiconductor layer; source and drain regions formed at opposing positions relative to the device channel, the source and drain regions including an n-type material deposited on the buried dielectric within a thickness of the thin semiconductor layer wherein the n-type material includes an amorphous phase; and a gate structure formed over the device channel. 9. The semiconductor device as recited in claim 8 , wherein the n-type material includes ZnO. 10. The semiconductor device as recited in claim 9 , wherein the ZnO is Al-doped. 11. The semiconductor device as recited in claim 8 , wherein the source and drain regions are formed to a substantially same thickness as the thin semiconductor layer. 12. The semiconductor device as recited in claim 8 , wherein the device channel includes material comprising the thin semiconductor layer.
Assignees
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Classifications
being Group IIB-VIA materials · CPC title
characterised by the chemical composition · CPC title
characterised by the semiconductor materials · CPC title
Structure · CPC title
N-type · CPC title
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Frequently asked questions
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- What does patent US9768254B2 cover?
- A semiconductor device includes an extremely thin semiconductor-on-insulator substrate (ETSOI) having a base substrate, a thin semiconductor layer and a buried dielectric therebetween. A device channel is formed in the thin semiconductor layer. Source and drain regions are formed at opposing positions relative to the device channel. The source and drain regions include an n-type material deposi…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H01L29/0847. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 19 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).