Process method and structure for high voltage MOSFETS

US9755052B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9755052-B2
Application numberUS-201314011078-A
CountryUS
Kind codeB2
Filing dateAug 27, 2013
Priority dateMay 10, 2013
Publication dateSep 5, 2017
Grant dateSep 5, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor power device disposed on a semiconductor substrate comprises a plurality of trenches formed at a top portion of the semiconductor substrate extending laterally across the semiconductor substrate along a longitudinal direction each having a nonlinear portion comprising a sidewall perpendicular to a longitudinal direction of the trench and extends vertically downward from a top surface to a trench bottom surface. The semiconductor power device further includes a trench bottom dopant region disposed below the trench bottom surface and a sidewall dopant region disposed along the perpendicular sidewall wherein the sidewall dopant region extends vertically downward along the perpendicular sidewall of the trench to reach the trench bottom dopant region and pick-up the trench bottom dopant region to the top surface of the semiconductor substrate.

First claim

Opening claim text (preview).

The invention claimed is: 1. A method for manufacturing a semiconductor power device on a semiconductor substrate comprising: depositing a hard mask atop the semiconductor substrate and patterning the hard mask according to a pre-determined trench configuration; etching the semiconductor substrate through the patterned hard mask to form a plurality of trenches in the semiconductor substrate along a longitudinal direction having trench sidewalls along the longitudinal direction and forming in at least one of the trenches a laterally bend to form a laterally bend trench sidewall that extends laterally along a nonlinear direction relative to the longitudinal direction thus exposing an entire vertical length of the laterally bend trench sidewall facing the longitudinal direction; applying a vertical high energy implant to form trench bottom dopant regions below trench bottom surfaces and also forming an upper partial sidewall dopant region disposed on an upper portion of the trench sidewalls along the longitudinal direction followed by removing the hard mask; depositing an insulation layer for covering the trench sidewalls and an insulation layer for covering the trench bottom surfaces; and applying a low energy tilt implant along the longitudinal direction of the trenches to implant to the laterally bend trench sidewall to form a sidewall dopant region along the entire vertical length of the laterally bend trench sidewall while maintaining the upper partial dopant region disposed on the upper portion of the trench sidewalls along the longitudinal direction at a distance above the trench bottom surfaces. 2. The method of claim 1 wherein: the step of forming the laterally bend trench sidewall further comprises a step of forming trench sidewall that extends laterally along a perpendicular direction relative to the longitudinal direction. 3. The method of claim 1 wherein: the step of forming the insulation layer for covering the trench sidewalls and forming the insulation layer for covering the trench bottom surfaces comprises a step of forming the insulation layers of approximately a same thickness. 4. The method of claim 1 wherein: the step of forming the insulation layer for covering the trench sidewalls and forming the insulation layer for covering the trench bottom surfaces comprises a step of forming the insulation layer covering the trench sidewalls with a smaller layer thickness than the insulation layer covering the trench bottom surfaces. 5. The method of claim 1 wherein: the step of forming the laterally bend trench sidewall further comprising a step of forming the laterally bend trench sidewall distributed at designated locations on the entire area of the semiconductor substrate. 6. The method of claim 1 further comprising: manufacturing the semiconductor power device as a high voltage (HV) MOSFET device. 7. The method of claim 1 further comprising: manufacturing the semiconductor power device as a high voltage (HV) IGBT device. 8. The method of claim 1 wherein: the step of forming the laterally bend trench sidewall further comprising a step of forming in at least one of the trenches to have at least two laterally bend trench sidewalls. 9. A method of implanting ions to an entire vertical length of a trench sidewall of a trench opened in a semiconductor substrate comprising: open the trench in the semiconductor substrate laterally along a longitudinal direction having trench sidewalls along the longitudinal direction and forming in the trench to have a laterally bend for forming a laterally bend trench sidewall that extends laterally along a nonlinear direction relative to the longitudinal direction wherein the laterally bend trench sidewall is oriented to have an entire vertical length exposed in facing the longitudinal direction for directly implanting ions to the laterally bend trench sidewall along the longitudinal direction. 10. A method of implanting ions to an entire vertical length of a trench sidewall of a trench opened in a semiconductor substrate comprising: open the trench in the semiconductor substrate laterally along a longitudinal direction having trench sidewalls along the longitudinal direction and forming in the trench to have a laterally notch for forming a laterally notch trench sidewall that extends laterally along a nonlinear direction relative to the longitudinal direction wherein the laterally notch trench sidewall is oriented to have an entire vertical length exposed in facing the longitudinal direction for directly implanting ions to the laterally notch trench sidewall along the longitudinal direction. 11. A method for manufacturing a semiconductor power device on a semiconductor substrate comprising: depositing a hard mask atop the semiconductor substrate and patterning the hard mask according to a pre-determined trench configuration; etching the semiconductor substrate through the patterned hard mask to form a plurality of trenches in the semiconductor substrate along a longitudinal direction having trench sidewalls along the longitudinal direction and forming in at least one of the trenches a laterally notch to form a laterally notch trench sidewall that extends laterally along a nonlinear direction relative to the longitudinal direction thus exposing an entire vertical length of the laterally notch trench sidewall facing the longitudinal direction; applying a vertical high energy implant to form trench bottom dopant regions below a trench bottom surface and also forming upper partial sidewall dopant region disposed on an upper portion of the trench sidewalls along the longitudinal direction followed by removing the hard mask; depositing an insulation layer for covering trench sidewalls and an insulation layer for covering the trench bottom surfaces; and applying a low energy tilt implant along the longitudinal direction of the trenches to implant to the laterally notch trench sidewall to form a sidewall dopant region along the entire vertical length of the laterally notch trench sidewall while maintaining the upper partial dopant region disposed on the upper portion of the trenches sidewalls along the longitudinal direction at a distance above the trench bottom surfaces. 12. The method of claim 11 wherein: the step of forming the notch sidewall further comprises a step of forming a trench notch having a shrunken trench width to form a laterally notch trench sidewall that extends laterally along a perpendicular direction relative to the longitudinal direction. 13. The method of claim 11 wherein: the step of forming the insulation layer for covering the trench sidewalls and forming the insulation layer for covering the trench bottom surfaces comprises a step of forming the insulation layers to have approximately a same thickness. 14. The method of claim 11 wherein: the step of forming the insulation layer for covering the trench sidewalls and forming the insulation layer for covering the trench bottom surfaces comprises a step of forming the insulation layer covering the trench sidewalls with a smaller layer thickness than the insulation layer covering the trench bottom surfaces. 15. The method of claim 11 wherein: the step of forming the laterally notch trench sidewall further comprising a step of forming the laterally notch trench sidewall distributed at designated locations on the entire area of the semiconductor substrate. 16. The method of claim 11 further comprising: manufacturing the semiconductor power device as a high voltage (HV) MOSFET device. 17. The method of claim 11 further comprising:

Assignees

Inventors

Classifications

  • characterised by the angle between the ion beam and the crystal planes or the main crystal surface (characterised by the angle between the ion beam and the mask H10P30/221) · CPC title

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

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What does patent US9755052B2 cover?
A semiconductor power device disposed on a semiconductor substrate comprises a plurality of trenches formed at a top portion of the semiconductor substrate extending laterally across the semiconductor substrate along a longitudinal direction each having a nonlinear portion comprising a sidewall perpendicular to a longitudinal direction of the trench and extends vertically downward from a top su…
Who is the assignee on this patent?
Ding Yongping, Lui Sik, Bobde Madhur, and 4 more
What technology area does this patent fall under?
Primary CPC classification H01L29/66666. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 05 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).