Methods of forming a microelectronic device structure, and related microelectronic device structures and microelectronic devices

US9717148B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9717148-B2
Application numberUS-201514859026-A
CountryUS
Kind codeB2
Filing dateSep 18, 2015
Priority dateSep 18, 2015
Publication dateJul 25, 2017
Grant dateJul 25, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.

First claim

Opening claim text (preview).

What is claimed is: 1. A microelectronic device structure, comprising: a structure protruding from a surface of another structure, and comprising: a proximal region adjacent an interface between the structure and the surface of the another structure; and a distal region opposing the proximal region; a wire coiled around at least one sidewall of the structure; and a fused region integral and continuous with the distal region of the structure and a terminal end of the wire. 2. The microelectronic device structure of claim 1 , wherein the wire comprises a single, solid, substantially homogeneous metal structure. 3. The microelectronic device structure of claim 2 , wherein the wire further comprises an insulative sheath physically contacting and surrounding a periphery of the single, solid, substantially homogeneous metal structure. 4. The microelectronic device structure of claim 1 , wherein the structure comprises a nickel-cobalt ferrous alloy, the wire comprises substantially pure nickel, and the fused region comprises nickel, cobalt, and iron. 5. The microelectronic device structure of claim 1 , wherein the fused region is substantially homogeneous. 6. The microelectronic device structure of claim 1 , wherein the fused region exhibits a non-planar surface and extends outwardly beyond lateral boundaries of at least one sidewall of the structure. 7. A microelectronic device, comprising: a microelectronic device structure comprising: at least one structure longitudinally projecting from a surface of another structure; and at least one wire coupled to the at least one structure, a portion of the at least one wire coiled up and around the at least one structure and attached to the at least one structure through at least one fused region integral and continuous with the at least one structure and the at least one wire. 8. The microelectronic device of claim 7 , wherein the at least one wire comprises only one solid, substantially homogeneous, annealed metal structure.

Assignees

Inventors

Classifications

  • using auxiliary members, e.g. aids for protecting the bonding area · CPC title

  • Manufacture or treatment of pads or other interconnections to be direct bonded · CPC title

  • comprising copper [Cu] · CPC title

  • the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires · CPC title

  • Auxiliary members, e.g. spacers · CPC title

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Frequently asked questions

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What does patent US9717148B2 cover?
A method of forming a microelectronic device structure comprises coiling a portion of a wire up and around at least one sidewall of a structure protruding from a substrate. At least one interface between an upper region of the structure and an upper region of the coiled portion of the wire is welded to form a fused region between the structure and the wire.
Who is the assignee on this patent?
Capital Formation Inc, Quartzdyne Inc
What technology area does this patent fall under?
Primary CPC classification H05K3/103. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 25 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).