Conductive polymer electronic devices with surface mountable configuration and methods for manufacturing same

Patent metadata

Field	Value
Publication number	US-9697934-B2
Application number	US-201615382368-A
Country	US
Kind code	B2
Filing date	Dec 16, 2016
Priority date	Apr 14, 2006
Publication date	Jul 4, 2017
Grant date	Jul 4, 2017

Abstract

Surface-mountable conductive polymer devices include a conductive polymer layer between first and second electrodes, on which are disposed first and second insulation layers, respectively. First and second planar conductive terminals are on the second insulation layer. A first cross-conductor connects the second electrode to the first terminal, and is separated from the first electrode by a portion of the first insulation layer. A second cross-conductor connects the first electrode to the second terminal, and is separated from the second electrode by a portion of the second insulation layer. In some embodiments, at least one cross-conductor includes a beveled portion through the first insulation layer to provide enhanced adhesion between the cross-conductor and the first insulation layer, while allowing greater thermal expansion without undue stress. In other embodiments, these advantages are achieved by having at least one cross-conductor in physical contact with a metallized anchor pad on the first insulation layer.

First claim

What is claimed is:

1. A method of manufacturing a surface-mountable polymer PTC device ( 130 ), comprising:
(a) forming a matrix of surface-mountable electronic devices by:
(i) laminating an active polymer layer ( 132 ) between first and second metal foil layers;
(ii) removing a portion of the first foil layer to form an array of first electrodes ( 134 ) and removing a portion of the second foil layer to form an array of second electrodes ( 136 );
(iii) applying a first insulation layer ( 142 ) and a second insulation layer ( 144 ) on the array of first and second electrodes ( 134 , 136 ), respectively;
(iv) applying a first metallization layer on the first insulation layer ( 142 );
(v) applying a second metallization layer on the second insulation layer ( 144 );
(vi) forming a first array of metallized vias ( 152 ), each having metallization connecting one of the second electrodes ( 136 ) and the first and second metallization layers, each of the first array of metallized vias being isolated from one of the first electrodes ( 134 ) by a portion ( 138 ) of the first insulation layer ( 142 ); and forming a second array of metallized vias ( 154 ), each having metallization connecting one of the first electrodes ( 134 ) to the first and second metallization layers, each of the second array of metallized vias being isolated from one of the second electrodes ( 136 ) by a portion ( 140 ) of the second insulation layer ( 144 );
(vii) removing part of the second metallization layer to form an array of first surface mount terminals ( 146 ) each physically connected to the first array of metallized vias ( 152 ) and a second array of surface mount terminals ( 148 ) each physically connected to the second array of metallized vias ( 154 ), each of the first surface mount terminals being electrically connected by one of the first array of metallized vias ( 152 ) to the second electrode ( 136 ) and isolated by a portion ( 138 ) of the first insulation layer ( 142 ) from the first electrode ( 134 ) and each of the second surface mount terminals being electrically connected by one of the second array of metallized vias ( 154 ) to the first electrode ( 134 ) and isolated by a portion ( 140 ) of the second insulation layer ( 144 ) from the second electrode ( 136 ); wherein the portion ( 138 ) of the first insulation layer ( 142 ) separating the first array of metallized vias ( 152 ) from the first electrode ( 134 ) comprises a first isolation area, and the portion ( 140 ) of the second insulation layer ( 144 ) separating the second array of metallized vias ( 154 ) from the second electrode ( 136 ) comprises a second isolation area; and wherein the first isolation area is configured as a first lateral band spaced from the first array of metallized vias ( 152 ) by a first metal area ( 139 ), and the second isolation area is configured as a second lateral band spaced from the second array of metallized vias ( 154 ) by a second metal area ( 141 ); and removing at least a portion of the first metallization layer adjacent to each of the first and second arrays of metallized vias ( 152 , 154 ); and
(b) singulating the matrix into a plurality of individual surface-mountable electronic devices ( 130 ), each of the devices including a first cross-conductor ( 156 ) defined by one of the metallized vias ( 152 ) in the first array of metallized vias, a second cross-conductor ( 158 ) defined by one of the metallized vias ( 154 ) in the second array of metallized vias, a first surface mount terminal ( 146 ) in physical contact with the first cross-conductor ( 156 ), and a second surface mount terminal ( 148 ) in physical contact with the second cross-conductor ( 158 );
wherein each of the first cross-conductors ( 156 ) is in physical contact with one of the second electrodes ( 136 ) and is isolated from one of the first electrodes ( 134 ) by the portion ( 138 ) of the first insulation layer ( 142 ) configured as a first lateral band spaced from the first cross-conductors ( 156 ) by a first metal area ( 139 ), and wherein each of the second cross-conductors ( 158 ) is in physical contact with one of the first electrodes ( 134 ) and is isolated from one of the second electrodes ( 136 ) by the portion ( 140 ) of the second insulation layer ( 144 ) configured as a second lateral band spaced from the second cross-conductors ( 158 ) by a second metal area ( 141 ).

2. A method of manufacturing a surface-mountable polymer PTC device ( 170 ), comprising:
(a) forming a matrix of surface-mountable electronic devices by:
(i) laminating an active polymer layer ( 172 a ) between first and second metal foil layers;
(ii) removing a portion of the first foil layer to form an array of first electrodes ( 174 a ) and removing a portion of the second foil layer to form an array of second electrodes ( 174 b ), thereby forming a first active conductive polymer laminated sheet structure;
(iii) laminating a second active polymer layer ( 172 b ) between third and fourth metal foil layers;
(iv) removing a portion of the third metal foil layer to form an array of third electrodes ( 174 c ) and removing a portion of the fourth metal foil layer to form an array of fourth electrodes ( 174 d ), thereby forming a second active conductive polymer laminated sheet structure;
(v) laminating the first and second laminated sheet structures together with a first insulation layer ( 180 ) to form a multiple active layer laminated structure;
(vi) applying a second insulation layer ( 182 ) on the first electrodes ( 174 a );
(vii) applying a third insulation layer ( 184 ) on the array of fourth electrodes ( 174 d );
(viii) applying a first metallization layer on the second insulation layer ( 182 );
(ix) applying a second metallization layer on the third insulation layer ( 184 );
(x) forming a first array of metallized vias ( 192 ), each having metallization connecting one of the second electrodes ( 174 b ) and third electrodes ( 174 c ) to the first and second metallization layers, each of the first array of metallized vias being isolated from one of the first electrodes ( 174 a ) by a portion ( 176 a ) of the second insulation layer ( 182 ) and isolated from one of the fourth electrodes ( 174 d ) by a portion ( 176 b ) of the third insulation layer ( 184 ); and forming a second array of metallized vias ( 194 ), each having metallization connecting one of the first electrodes ( 174 a ) and one of the fourth electrodes ( 174 d ) to the first and second metallization layers, each of the second array of metallized vias being isolated from one of the second electrodes ( 174 b ) by a portion ( 178 a ) of the first insulation layer ( 180 ) and isolated from one of the third electrodes ( 174 c ) by a portion ( 178 b ) of the first insulation layer ( 180 );
(xi) removing part of the second metallization layer to form an array of first surface mount terminals ( 186 ) each physically connected to the first array of metallized vias ( 192 ) and a second array of surface mount terminals ( 188 ) each physically connected to the second array of metallized vias ( 194 ), each of the first surface mount terminals being electrically connected by one of the first array of metallized vias ( 192 ), to the second electrode ( 174 b ) and the third electrode ( 174 c ) and isolated by a portion ( 176 a ) of the second insulation layer ( 182 ) from the first electrode ( 174 a ) and isolated by a portion ( 176 b ) of the third insulation layer ( 184 ) from the fourth electrode ( 174 d ) and each of the second surface mount terminals being electrically connected by one of the second array of metallized vias ( 194 ) to the first electrode ( 174 a ) and the fourth electrode ( 174 d ) and isolated by a portion ( 178 a ) of the first insulation layer ( 180 ) from the second electrode ( 174 b ) and isolated by a portion

Assignees

• Bourns Inc

Inventors

• Bourns Gordon L
• Chu Stelar
• Grindell Daniel E
• Huang David
• Kelly John
• Meijer Erik

Classifications

• Y10T29/49165

  by forming conductive walled aperture in base · CPC title

• H01C17/02

  adapted for manufacturing resistors with envelope or housing (apparatus or processes for filling or compressing insulating material in heating element tubes H05B3/52) · CPC title

• H01C7/18

  comprising a plurality of layers stacked between terminals · CPC title

• H01C7/049

  mainly consisting of organic or organo-metal substances · CPC title

• H01C7/041

  formed with two or more layers · CPC title