Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink-harmonic wrinkle reduction

US9653601B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9653601-B2
Application numberUS-201514804198-A
CountryUS
Kind codeB2
Filing dateJul 20, 2015
Priority dateJul 11, 2005
Publication dateMay 16, 2017
Grant dateMay 16, 2017

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Abstract

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A method and apparatus for use in improving linearity sensitivity of MOSFET devices having an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to address degradation in second- and third-order intermodulation harmonic distortion at a desired range of operating voltage in devices employing an accumulated charge sink.

First claim

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The invention claimed is: 1. An accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) comprising: a gate; a source; a drain; a body, wherein the body comprises a gate modulated conductive channel between the source and the drain, wherein said gate modulated conductive channel has an on-state polarity and an off-state polarity; a gate oxide layer positioned between the gate and the body; and at least one accumulated charge sink (ACS) region coupled to the body and to the gate to control accumulated charge proximate to said gate modulated conductive channel when operated at the off-state polarity. 2. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 1 , wherein said at least one accumulated charge sink region has a polarity opposite to that of the off-state polarity of the gate modulated conductive channel. 3. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 1 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said source. 4. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 1 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said drain. 5. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 1 , wherein said at least one accumulated charge sink region has a location within said body and opposite to said gate oxide layer. 6. An accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) comprising: a gate; a source; a drain; a body, wherein the body comprises a gate modulated conductive channel between the source and the drain, wherein said gate modulated conductive channel has an on-state polarity and an off-state polarity; a gate oxide layer positioned between the gate and the body; at least one accumulated charge sink (ACS) region coupled to the body; and at least one diode coupled between the ACS region and the gate to control accumulated charge proximate to said gate oxide layer when operated at the off-state polarity. 7. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 6 , wherein said at least one accumulated charge sink region has a polarity opposite to that of the off-state polarity of the gate modulated conductive channel. 8. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 6 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said source. 9. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 6 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said drain. 10. An accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) comprising: a gate; a source of a first type; a drain of the first type; a body, wherein the body comprises a gate modulated conductive channel between the source and the drain, wherein said conductive channel is the first type in an on-state and a second type in an off-state; a gate oxide layer positioned between the gate and the body; and at least one accumulated charge sink (ACS) region of the second type coupled to the body and to the gate to control accumulated charge proximate to said gate modulated conductive channel when operated in the off-state. 11. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 10 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said source. 12. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 10 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said drain. 13. An accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) comprising: a gate; a source of a first type; a drain of the first type; a body, wherein the body comprises a gate modulated conductive channel between the source and the drain, wherein said conductive channel is the first type in an on-state and a second type in an off-state; a gate oxide layer positioned between the gate and the body; at least one accumulated charge sink (ACS) region of the second type coupled to the body; and at least one diode coupled between the ACS region and the gate to control accumulated charge proximate to said gate oxide when operated in the off-state. 14. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 13 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said source. 15. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 13 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said drain. 16. An accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) comprising: a gate; a source of a first type; a drain of the first type; a body, wherein the body comprises a gate modulated conductive channel between the source and the drain, wherein said conductive channel is the first type in an on-state and a second type in an off-state; a gate oxide layer positioned between the gate and the body and at least one accumulated charge sink (ACS) region of the second type coupled to the body; and a control circuit coupled to said at least one ACS region to control accumulated charge proximate to said gate modulated conductive channel when operated in the off-state. 17. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 16 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said source. 18. The accumulated charge control (ACC) floating body metal-oxide-semiconductor field effect transistor (MOSFET) of claim 16 , wherein said at least one accumulated charge sink region has a location within said body and proximate to said drain. 19. A method of accumulated charge control (ACC) in a floating body metal-oxide-semiconductor field effect transistor (MOSFET) comprising: determining whether a gate modulated conductive channel is in an on-state polarity and an off-state polarity; and determining an accumulation charge control voltage to administer to at least one accumulated charge sink region when said gate modulated conductive channel is in an off state polarity. 20. The method of claim 19 , wherein said accumulation charge control voltage is administered to an area proximate a gate oxide. 21. The method of claim 19 , wherein said determination of whether said gate modulated conductive channel is in the on-state polarity and the off-state polarity is based on a gate voltage. 22. The method of claim 19 , whe

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What does patent US9653601B2 cover?
A method and apparatus for use in improving linearity sensitivity of MOSFET devices having an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to address degradation in second- and third-order intermodulation harmonic distortion at a desired range of operating voltage in devices employing an accumulated charge sink.
Who is the assignee on this patent?
Peregrine Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification H01L29/7841. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 16 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 7 related publications on this page (citations in our corpus or others sharing the same primary CPC).