Direct sigma-delta receiver

Patent metadata

Field	Value
Publication number	US-9496889-B2
Application number	US-201414512923-A
Country	US
Kind code	B2
Filing date	Oct 13, 2014
Priority date	Oct 13, 2014
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

A sigma delta receiver achieves increased stability and noise reduction. The sigma delta receiver includes a first integrator stage, an isolation stage, a second integrator stage, and a quantization stage. The first integrator stage receives an analog radio frequency (RF) signal from an antenna and generates an analog baseband signal based on the analog RF signal. The isolation stage is coupled to an output of the first integrator stage. The isolation stage receives the analog baseband signal from the first integrator stage and amplifies the analog baseband signal. The second integrator stage is coupled to an output of the isolation stage to receive the analog baseband signal. The second integrator stage further amplifies the analog baseband signal. The quantization stage converts the analog baseband signal to a digital signal, and outputs the digital signal.

First claim

What is claimed is:

1. A sigma delta receiver comprising:
a first integrator stage to receive an analog radio frequency (RF) signal from an antenna and to generate an analog baseband signal based on the analog RF signal;
an isolation stage coupled to an output of the first integrator stage, the isolation stage to receive the analog baseband signal from the first integrator stage and to amplify the analog baseband signal;
a second integrator stage coupled to an output of the isolation stage to receive the analog baseband signal, to further amplify the analog baseband signal, wherein the second integrator stage comprises an amplifier and a feedback capacitor that is connected in parallel with the amplifier, wherein the amplifier has a positive input terminal and a negative input terminal, and wherein the positive input terminal is connected to a fixed reference voltage;
a quantization stage coupled to an output of the second integrator stage to convert the analog baseband signal to a digital signal, and to output the digital signal;
a first feedback loop from an output of the quantization stage to the negative input terminal of the amplifier of the second integrator stage; and
a second feedback loop from the output of the quantization stage to an input of a transconductance amplifier of the isolation stage without processing through the first integrator stage.

2. The sigma delta receiver of claim 1 , wherein the transconductance amplifier isolates the first integrator stage from the second integrator stage.

3. The sigma delta receiver of claim 1 , wherein the first feedback loop comprises a digital-to-analog converter (DAC) to contribute to signal stability within the second integrator stage.

4. The sigma delta receiver of claim 3 , wherein the DAC is configured to increase a unit gain frequency of the second integrator stage.

5. The sigma delta receiver of claim 1 , wherein the first integrator stage comprises a low-noise transimpedance amplifier (LNTA).

6. The sigma delta receiver of claim 1 , wherein the first integrator stage further comprises a mixer to convert the analog RF signal to the analog baseband signal.

7. The sigma delta receiver of claim 1 , wherein the second feedback loop comprises a digital-to-analog converter (DAC).

8. The sigma delta receiver of claim 1 , wherein the first and second integrator stages are configured to provide second order shaping of a quantization noise.

9. The sigma delta receiver of claim 1 , wherein the second integrator stage is cascaded with an integrated resonator.

10. The sigma delta receiver of claim 9 , wherein the second integrator stage comprises further resonator stages to create a notch in a noise transfer function (NTF) of the sigma delta receiver.

11. The sigma delta receiver of claim 1 , wherein the first integrator stage and the second integrator stage are part of a sigma-delta analog-to-digital converter (ADC).

12. A radio comprising:
an antenna;
a sigma delta receiver coupled to the antenna, wherein the sigma delta receiver comprises:
a first integrator stage to process a radio frequency (RF) signal;
a second integrator stage to process a baseband signal derived from the RF signal, wherein the second integrator stage comprises an amplifier and a feedback capacitor that is connected in parallel with the amplifier, wherein the amplifier has a positive input terminal and a negative input terminal, and wherein the positive input terminal is connected to a fixed reference voltage;
a quantization stage to perform down-conversion of the baseband signal;
an isolation stage coupled between an output of the first integrator stage and an input of the second integrator stage, wherein the isolation stage comprises a transconductance amplifier;
a first feedback loop from an output of the quantization stage to the negative input terminal of the amplifier of the second integrator stage; and
a second feedback loop from the output of the quantization stage to an input of the transconductance amplifier of the isolation stage without processing through the first integrator stage; and

a digital signal processor coupled to the sigma delta receiver to process a digital signal generated from the baseband signal.

13. The radio of claim 12 , wherein the first feedback loop comprises a digital-to-analog converter (DAC) to increase a unit gain frequency of the second integrator stage and contribute to signal stability within the second integrator stage.

14. The sigma delta receiver of claim 1 , wherein the positive input terminal is directly connected to the ground.

Assignees

• Nxp Bv

Inventors

• Pavlovic Nenad

Classifications

• H03M3/464 Primary

  Details of the digital/analogue conversion in the feedback path · CPC title

• H03M3/368

  of noise other than the quantisation noise already being shaped inherently by delta-sigma modulators · CPC title

• H03M3/494

  Sampling or signal conditioning arrangements specially adapted for delta-sigma type analogue/digital conversion systems · CPC title

• H04B1/0003

  Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain (digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00) · CPC title

• H03M3/454

  with distributed feedback, i.e. with feedback paths from the quantiser output to more than one filter stage · CPC title