Lithographic technique for feature cut by line-end shrink

Patent metadata

Field	Value
Publication number	US-9613850-B2
Application number	US-201514835495-A
Country	US
Kind code	B2
Filing date	Aug 25, 2015
Priority date	Dec 19, 2014
Publication date	Apr 4, 2017
Grant date	Apr 4, 2017

Abstract

A technique for patterning a workpiece such as an integrated circuit workpiece is provided. In an exemplary embodiment, the method includes receiving a dataset specifying a plurality features to be formed on the workpiece. A first patterning of a hard mask of the workpiece is performed based on a first set of features of the plurality of features, and a first spacer material is deposited on a sidewall of the patterned hard mask. A second patterning is performed based on a second set of features, and a second spacer material is deposited on a sidewall of the first spacer material. A third patterning is performed based on a third set of features. A portion of the workpiece is selectively processed using a pattern defined by a remainder of at least one of the patterned hard mask layer, the first spacer material, or the second spacer material.

First claim

What is claimed is:

1. A method comprising:
receiving a workpiece including a material layer and a hard mask material disposed thereupon;
performing a lithographic patterning of the hard mask material to define a recess therein, wherein the patterned hard mask material further defines a linking feature;
depositing a spacer within the recess of the patterned hard mask material to define at least two physically separated feature regions within the recess, wherein the linking feature is disposed between the at least two physically separated feature regions; and
selectively processing a portion of the workpiece based on a pattern defined by the patterned hard mask material and the spacer within the recess.

2. The method of claim 1 , wherein the depositing of the spacer within the recess includes performing a substantially conformal deposition of the spacer and performing an etching process configured to leave a portion of the spacer on a side surface of the hard mask material.

3. The method of claim 2 , wherein the substantially conformal deposition includes an atomic layer deposition (ALD) process.

4. The method of claim 2 , wherein the substantially conformal deposition includes exposing the hard mask material to a liquid reactant to deposit the spacer.

5. The method of claim 1 , wherein the processing of the portion of the workpiece includes etching an exposed portion of the material layer based on the pattern.

6. The method of claim 5 , wherein the processing of the portion of the workpiece further includes depositing a conductive material within the etched material layer.

7. A method of patterning a workpiece, the method comprising:
receiving a dataset specifying a plurality features to be formed on the workpiece;
performing a first patterning of a hard mask of the workpiece based on a first set of features of the plurality of features, wherein the first patterning defines at least an individual recess within the hard mask;
thereafter depositing a first spacer material on a sidewall of the patterned hard mask within the individual recess;
performing a second patterning of the hard mask based on a second set of features of the plurality of features;
thereafter depositing a second spacer material on a sidewall of the first spacer material within the individual recess, to define at least two physically separated feature regions within the individual recess;
performing a third patterning of the workpiece based on a third set of features of the plurality of features; and
selectively processing a portion of the workpiece using a pattern defined by a remainder of at least one of the hard mask layer, the first spacer material, or the second spacer material, the remainder remaining after the performing of the first patterning, the second patterning, and the third patterning.

8. The method of claim 7 , wherein the performing of the third patterning includes selectively removing an exposed portion of the first spacer material.

9. The method of claim 7 , wherein the performing of the third patterning is configured to avoid significant etching of an exposed portion of the second spacer material.

10. The method of claim 7 , wherein the performing of the first patterning includes forming a linking feature between a first feature region of the first set of features and a second feature region of the first set of features, and wherein the linking feature has a width less than each of the first feature region and the second feature region.

11. The method of claim 7 , wherein the performing of the first patterning is configured such that the depositing of the first spacer material deposits the first spacer material within a region corresponding to the third set of features.

12. The method of claim 11 , wherein the performing of the first patterning is configured such that the depositing of the first spacer material deposits the first spacer material within each track corresponding to the third set of features that is not adjacent a feature linking two features of the first set of features.

13. The method of claim 7 , wherein the third set of features have a track pitch within the set that is different from a track pitch within the first set of features and a track pitch within the second set of features.

14. The method of claim 13 , wherein the track pitch within the third set of features is about half as large as the track pitch within the first set and the track pitch within the second set.

15. The method of claim 7 , wherein the processing of the portion of the workpiece includes patterning another hard mask layer that is different from the patterned hard mask layer based on the pattern defined by the remainder.

16. A method of patterning a material layer, the method comprising:
receiving a workpiece including the material layer and a hard mask layer;
patterning the hard mask layer according to a first set of features to be formed on the workpiece, wherein the patterning defines a recess in the hard mask layer;
depositing a first spacing material on a side surface of the patterned hard mask layer within the recess;
thereafter patterning the hard mask layer according to a second set of features to be formed on the workpiece;
depositing a second spacing material on at least one side surface of the first spacing material within the individual recess, to define at least two physically separated feature regions within the recess;
thereafter patterning the first spacing material according to a third set of features to be formed on the workpiece; and
transferring to the material layer a pattern defined by at least one of: the hard mask layer, the first spacing layer; or the second spacing layer.

17. The method of claim 16 , wherein the patterning of the first spacing material is configured to avoid significant etching of an exposed portion of the second spacing material.

18. The method of claim 16 , wherein the patterning of the hard mask layer according to the first set of features includes forming a linking feature between a first feature and a second feature, each of the first set of features.

19. The method of claim 18 , wherein the linking feature has a width that is less than a width of a region associated with the first feature and less than a width of a region associated with the second feature.

20. The method of claim 16 , wherein the patterning of the hard mask layer according to the first set of features is configured such that the depositing of the first spacing material deposits the first spacing material within a region corresponding to the third set of features.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Yen Yung-Sung
• Chen Chun-Kuang
• Kao Ko-Bin
• Hsieh Ken-Hsien
• Liu Ru-Gun

Classifications

• H10P76/4085

  characterised by the processes involved to create the masks · CPC title

• H10P76/204 Primary

  of organic photoresist masks · CPC title

• H10P50/73

  using masks for insulating materials · CPC title

• H10P14/6339

  deposition by cyclic CVD, e.g. ALD, ALE or pulsed CVD · CPC title

• H10W20/089

  using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning · CPC title