Two-terminal nanotube devices and systems and methods of making same

US9601498B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9601498-B2
Application numberUS-201113113398-A
CountryUS
Kind codeB2
Filing dateMay 23, 2011
Priority dateMay 9, 2005
Publication dateMar 21, 2017
Grant dateMar 21, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electrical stimuli to at least one of the first and second terminal(s) to change the relative resistance of the device between the first and second terminals between a relatively high resistance and a relatively low resistance. The relatively high resistance between the first and second terminals corresponds to a first state of the device, and the relatively low resistance between the first and second terminals corresponds to a second state of the device.

First claim

Opening claim text (preview).

What is claimed is: 1. A two terminal non-volatile nanotube memory device, comprising: a first conductive terminal, said first conductive terminal having a first sidewall; a second conductive terminal, said second conductive terminal having a second sidewall; a nanotube fabric in permanent electrical communication with said first sidewall and said second sidewall, said nanotube fabric comprising a plurality of nanotube elements that provide at least one electrically modifiable conductive pathway through said nanotube fabric between said first conductive terminal and said second conductive terminal; an insulating element disposed between said first conductive terminal and said second conductive terminal; and a control circuitry in electrical communication with at least one of said first conductive terminal and said second conductive terminal; wherein said control circuitry is configured to apply a first voltage difference between said first conductive terminal and said second conductive terminal so as to change the resistance of said nanotube fabric from a relatively low resistance to a relatively high resistance; wherein said control circuitry is configured to apply a second voltage difference between said first conductive terminal and said second conductive terminal so as to change the resistance of said nanotube fabric from a relatively high resistance to a relatively low resistance; wherein said nanotube fabric is capable of being repeatedly adjusted among at least a relatively high resistance and a relatively low resistance, responsive to an electrical stimulus applied between said first conductive terminal and said second conductive terminal to modify at least one of said at least one electrically modifiable conductive pathway through said nanotube fabric. 2. The device of claim 1 , wherein said insulating element has a third sidewall disposed between said first conductive terminal and said second conductive terminal, and wherein said nanotube fabric is positioned adjacent to said third sidewall. 3. The device of claim 1 , wherein said second conductive terminal is substantially above said first conductive terminal. 4. The device of claim 1 , wherein said nanotube fabric overlaps at least a portion of said first sidewall. 5. The device of claim 4 , wherein said nanotube fabric overlaps an entire surface of said first sidewall. 6. The device of claim 1 , wherein said nanotube fabric overlaps at least a portion of said second sidewall. 7. The device of claim 6 , wherein said nanotube fabric overlaps an entire surface of said second sidewall. 8. The device of claim 1 , wherein said first conductive terminal comprises a material that conducts electricity relatively well and conducts heat relatively poorly. 9. The device of claim 1 , wherein said first conductive terminal and said second conductive terminal comprise metal. 10. The device of claim 9 , wherein said metal is selected from the list consisting of Ru, Ti, Cr, Al, Au, Pd, Ni, W, Cu, Mo, Ag, In, Ir, Pb, Sn, TiN, TiAu, TiCu, TiPd, PbIn, and TiW. 11. The device of claim 1 , wherein said nanotube fabric comprises one or more of single-walled nanotubes, double-walled nanotubes, multi-walled nanotubes, and bundles of nanotubes. 12. The device of claim 1 , wherein said relatively high resistance corresponds to a first state of said nanotube memory device and said relatively low resistance corresponds to a second state of said nanotube memory device, said first state and said second state being nonvolatile. 13. The device of claim 12 , wherein said control circuitry is further configured to apply a third voltage difference between said first conductive terminal and said second conductive terminal so as to determine said state of said nanotube memory device. 14. The device of claim 13 , wherein said third voltage difference is sufficiently low such that said control circuitry senses the resistance between said first conductive terminal and said second conductive terminal, and keeps said state of said nanotube memory device. 15. The device of claim 14 , wherein said third voltage difference is less than about 2 V. 16. The device of claim 1 , wherein said relatively high resistance is at least about ten times greater than said relatively low resistance. 17. The device of claim 16 , wherein said relatively high resistance is greater than about 1 mega-ohm and said relatively low resistance is less than about 100 kilo-ohm. 18. The device of claim 1 , wherein said first voltage difference comprises a relatively high voltage difference, ranging from about 3 V to about 10 V. 19. The device of claim 1 , wherein said second voltage difference comprises a relatively low voltage difference, ranging from about 1 V to about 5 V, thereby rendering a relatively low current, ranging from about 100 nA to about 100 μA, across said first conductive terminal and second conductive terminal. 20. The device of claim 1 wherein said nanotube fabric conforms to at least one of said first conductive terminal, said second conductive terminal, and said insulating element. 21. A two terminal non-volatile nanotube memory device, comprising: a first conductive terminal, said first conductive terminal having a first sidewall; a second conductive terminal, said second conductive terminal having a second sidewall; a nanotube fabric in permanent electrical communication with said first sidewall and said second sidewall, said nanotube fabric comprising a plurality of nanotube elements that provide at least one electrically modifiable conductive pathway through said nanotube fabric between said first conductive terminal and said second conductive terminal; an insulating element disposed between said first conductive terminal and said second conductive terminal; a protective insulator on a surface of said nanotube fabric, said surface of said nanotube fabric being remote to said first sidewall and said second sidewall; and a control circuitry in electrical communication with at least one of said first conductive terminal and said second conductive terminal; wherein said control circuitry is configured to apply a first voltage difference between said first conductive terminal and said second conductive terminal so as to change the resistance of said nanotube fabric from a relatively low resistance to a relatively high resistance; wherein said control circuitry is configured to apply a second voltage difference between said first conductive terminal and said second conductive terminal so as to change the resistance of said nanotube fabric from a relatively high resistance to a relatively low resistance; wherein said nanotube fabric is capable of being repeatedly adjusted among at least a relatively high resistance and a relatively low resistance, responsive to an electrical stimulus applied between said first conductive terminal and said second conductive terminal to modify at least one of said at least one electrically modifiable conductive pathway through said nanotube fabric. 22. The device of claim 21 , wherein said protective insulator is selected from the list consisting of Si, SiN, SiO 2 , Al 2 O 3 , and TEOS. 23. The device of claim 21 , wherein said relatively high resistance corresponds to a first state of said nanotube memory device and said relatively low resistance corresponds to a second state of said nanotube memory device, said first state and said second state being nonvolatile. 24. The device of cl

Assignees

Inventors

Classifications

  • H01L27/112Primary

    Electricity · mapped topic

  • Information storage or retrieval using nanostructure · CPC title

  • using electrically-fusible links · CPC title

  • Electricity · mapped topic

  • B82Y10/00Primary

    Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic · CPC title

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What does patent US9601498B2 cover?
A two terminal memory device includes first and second conductive terminals and a nanotube article. The article has at least one nanotube, and overlaps at least a portion of each of the first and second terminals. The device also includes stimulus circuitry in electrical communication with at least one of the first and second terminals. The circuit is capable of applying first and second electr…
Who is the assignee on this patent?
Bertin Claude L, Meinhold Mitchell, Konsek Steven L, and 6 more
What technology area does this patent fall under?
Primary CPC classification H01L27/112. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 21 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).