Modular grinding apparatuses and methods for wafer thinning

Patent metadata

Field	Value
Publication number	US-9570311-B2
Application number	US-201213370946-A
Country	US
Kind code	B2
Filing date	Feb 10, 2012
Priority date	Feb 10, 2012
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

Methods of thinning a plurality of semiconductor wafers and apparatuses for carrying out the same are disclosed. A grinding module within a set of grinding modules receives and grinds a semiconductor wafer. A polishing module receives the semiconductor wafer from the grinding module and polishes the wafer. The polishing module is configured to polish the semiconductor wafer in less time than the grinding module is configured to grind the corresponding wafer.

First claim

What is claimed is:

1. A method of thinning a set of semiconductor wafers, the method comprising:
placing a semiconductor wafer in a grinding module of a grinding assembly using a first robotic arm;
grinding the semiconductor wafer with a coarse grinding tool at the grinding module amongst a set of grinding modules of the grinding assembly, wherein the set of grinding modules includes at least three grinding modules;
grinding the semiconductor wafer with a fine grinding tool at the grinding module;
moving the semiconductor wafer to a set of polishing modules using a second robotic arm different from the first robotic arm, wherein each polishing module of the set of polishing modules receives semiconductor wafers directly from each grinding module in the set of grinding modules, and the set of polishing modules includes at least two polishing modules; and
polishing the semiconductor wafer at the polishing module, wherein the polishing module processes the semiconductor wafer in about one-third of a time taken by a grinding cycle of the grinding module of the set of grinding modules.

2. The method of claim 1 further comprising:
grinding at least one or more additional semiconductor wafers with a coarse grinding tool at a corresponding additional grinding module amongst the set of grinding modules;
grinding the at least one or more additional semiconductor wafers with a fine grinding tool at the corresponding additional grinding module;
moving the at least one or more additional semiconductor wafers to the polishing module; and
polishing the at least one or more additional semiconductor wafers at the polishing module.

3. The method of claim 2 further comprising cleaning the semiconductor wafers subsequent to the polishing.

4. The method of claim 3 further comprising returning the semiconductor wafer to a front opening universal pod (FOUP).

5. The method of claim 2 , wherein a total time for polishing the semiconductor wafers is less than a total time for grinding the corresponding semiconductor wafers.

6. An apparatus for thinning semiconductor wafers, the apparatus comprising:
a set of two or more grinding modules for grinding semiconductor wafers, wherein the set of two or more grinding modules comprises a module configured to perform coarse grinding;
at least two polishing modules for polishing the semiconductor wafers, wherein each polishing module of the at least two polishing modules is configured to receive semiconductor wafers directly from every grinding module of the set of grinding modules;
a conveyor-type system configured to receive polished semiconductor wafers from the at least one polishing module; and
a cleaning module for cleaning the semiconductor wafers configured to receive semiconductor wafers from the conveyor-type system.

7. The apparatus of claim 6 , wherein the at least two polishing modules are configured to polish a semiconductor wafer in less time than a grinding module of the set is configured to grind a corresponding semiconductor wafer.

8. The apparatus of claim 6 , wherein the at least two polishing modules are configured to receive semiconductor wafers from the at least two grinding modules sequentially.

9. The apparatus of claim 6 , wherein the at least two polishing modules are on an opposite side of the conveyor-type system from each grinding module of the set of two or more grinding modules.

10. The apparatus of claim 6 , wherein each of the set of grinding modules includes a tool for coarse grinding and a tool for fine grinding, and wherein the tool for coarse grinding and the tool for fine grinding are utilized by the same spindle.

11. The apparatus of claim 6 , wherein the apparatus is configured to receive and return semiconductor wafers from and to a front opening universal pod (FOUP).

12. An apparatus for thinning semiconductor wafers, the apparatus comprising:
a set of grinding modules for grinding semiconductor wafers;
a set of polishing modules configured to receive the semiconductor wafers from the set of grinding modules and to polish the semiconductor wafers, wherein each polishing module of the set of polishing modules is configured to polish a semiconductor wafer in at most one-third of a time taken by a grinding cycle of a grinding module of the set of grinding modules, and each polishing module of the set of polishing modules is configured to receive the semiconductor wafers directly from each grinding module of the set of grinding modules; and
at least one cleaning module configured to receive the semiconductor wafers from the set of polishing modules and to clean the semiconductor wafers.

13. The apparatus of claim 12 , wherein each polishing module of the set of polishing modules is configured to receive semiconductor wafers from at least two grinding modules of the set of grinding modules.

14. The apparatus of claim 13 , wherein each polishing module of the set of polishing modules is configured to polish a semiconductor wafer in less time than a grinding module of the set of grinding modules is configured to grind a corresponding semiconductor wafer.

15. The apparatus of claim 14 , wherein each of the set of grinding modules includes a tool for coarse grinding and a tool for fine grinding, and wherein the tool for coarse grinding and the tool for fine grinding are utilized by the same spindle.

16. The apparatus of claim 15 , wherein the apparatus is configured to receive and return semiconductor wafers from and to a front opening universal pod (FOUP).

17. The apparatus of claim 12 , further comprising a transfer module between each grinding module of the set of grinding modules and each polishing module of the set of polishing modules.

18. The apparatus of claim 17 , wherein the at least one cleaning module is on a same side of the transfer module as the set of polishing modules.

19. The apparatus of claim 12 , wherein a first polishing module of the set of polishing modules is configured to polish the semiconductor wafer for a same duration as a second polishing module of the set of polishing modules.

20. The apparatus of claim 12 , wherein a number of polishing modules in the set of polishing modules is selected based on a difference between the time to polish the semiconductor wafer using a polishing module of the set of polishing modules and a time to grind the wafer using a grinding module of the set of grinding modules.

Assignees

• Kuo Chun-Ting
• Chen Kei-Wei
• Wang Ying-Lang
• Wei Kuo-Hsiu
• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Kuo Chun-Ting
• Chen Kei-Wei
• Wang Ying-Lang
• Wei Kuo-Hsiu

Classifications

• H10P52/00 Primary

  Grinding, lapping or polishing of wafers, substrates or parts of devices · CPC title

• B24B37/042

  operating processes therefor · CPC title

• H01L21/304 Primary

  Electricity · mapped topic

• B24B37/00

  Lapping machines or devices; Accessories (B24B3/00 takes precedence) · CPC title