Silicon carbide bipolar junction transistor including shielding regions

Patent metadata

Field	Value
Publication number	US-9515176-B2
Application number	US-201313938006-A
Country	US
Kind code	B2
Filing date	Jul 9, 2013
Priority date	Jan 31, 2011
Publication date	Dec 6, 2016
Grant date	Dec 6, 2016

Abstract

A silicon carbide (SiC) bipolar junction transistor (BJT) and a method of manufacturing such a SiC BJT is provided. The SiC BJT can include a collector region having a first conductivity type, a base region having a second conductivity type opposite the first conductivity type, and an emitter region having the first conductivity type, the collector region, the base region and the emitter region being arranged as a stack. The emitter region defining an elevated structure defined at least in part by an outer sidewall on top of the stack. The base region having a portion capped by the emitter region and defining an intrinsic base region where the intrinsic base region includes a portion extending from the emitter region to the collector region. The SiC BJT can include a first shielding region and a second shield region each having the second conductivity type.

First claim

What is claimed is:

1. A silicon carbide (SiC) bipolar junction transistor (BJT), comprising:
a collector region having a first conductivity type;
a base region having a second conductivity type opposite the first conductivity type;
an emitter region having the first conductivity type, the collector region, the base region and the emitter region being arranged as a stack, the emitter region defining an elevated structure defined at least in part by an outer sidewall on top of the stack,
the base region having a portion capped by the emitter region and defining an intrinsic base region; and
a first shielding region and a second shielding region each having the second conductivity type, the first shielding region being arranged on a laterally opposite side of a portion of the intrinsic base region from the second shielding region, the collector region having a portion defining a channel portion in the collector region and separating the first shielding region from the second shielding region below the portion of the intrinsic base region, the first shielding region having a dopant level at an interface with the channel portion greater than a dopant level of the portion of the intrinsic base region, the first shielding region extending to a further depth in the stack than the portion of the intrinsic base region and by a distance corresponding to about 15% to 150% of a width the channel portion.

2. The SiC BJT of claim 1 , wherein the distance corresponds to about 40% to 60% of the width of the channel portion of the collector region separating the first shielding region from the second shielding region.

3. The SiC BJT of claim 1 , wherein the first shielding region is at least one of an epitaxially grown region and an ion implanted region.

4. The SiC BJT of claim 1 , wherein the first shielding region laterally extends from the portion of the intrinsic base region to outside the intrinsic base region.

5. The SiC BJT of claim 1 , wherein the portion of the intrinsic base region is laterally spaced away from the outer sidewall of the emitter region by a portion of the first shielding region.

6. The SiC BJT of claim 1 , wherein the first shielding region defines a part of the base region.

7. The SiC BJT of claim 1 , wherein the SiC BJT is a NPN SiC BJT.

8. A SiC power device including a plurality of BJTs, each of the plurality of BJTs being configured as defined in claim 1 , the plurality of BJTs being arranged as a one-dimensional array or as a two-dimensional array, the plurality of BJTs being connected via interconnect.

9. A unit cell of a power semiconductor device, comprising:
a first region having a first conductivity type;
a second region having a second conductivity type opposite the first conductivity type;
a third region having the first conductivity type, the first region, the second region and the third region being arranged as a stack, the third region defining an elevated structure defined at least in part by an outer sidewall on top of the stack, the second region having a portion capped by the third region and defining an active region of the second region; and
two shielding regions having the second conductivity type, the active region including a first portion and at least part of the two shielding regions, each of the two shielding extending further down in the stack than the active region and by a distance corresponding to about 15% to 150% of a width of a channel portion of the first region disposed between the two shielding regions and below the third region, the first portion of the active region having a dopant level less than a dopant level of one of the two shielding regions at an interface between the one of the two shielding regions and the channel portion.

10. A silicon carbide (SiC) bipolar junction transistor (BJT), comprising:
a collector region having a first conductivity type;
a base region having a second conductivity type opposite the first conductivity type;
an emitter region having the first conductivity type, the collector region, the base region and the emitter region being arranged as a stack, the emitter region defining an elevated structure defined at least in part by an outer sidewall on top of the stack, the base region having a portion capped by the emitter region and defining an intrinsic base region; and
two shielding regions having the second conductivity type and a dopant dose greater than a dopant dose of a portion of the intrinsic base region, each of the two shielding regions being arranged on laterally opposite sides of the portion of the intrinsic base region, each of the two shielding regions having a portion disposed directly below the emitter region and extending further down in the stack than the intrinsic base region, the two shielding regions being configured to provide shielding of an electric field in the portion of the intrinsic base region, the two shielding regions and the portion of the intrinsic base region each having an upper boundary below the emitter region.

11. The SiC BJT of claim 10 , wherein the two shielding regions laterally surround the portion of the intrinsic base region.

12. The SiC BJT of claim 1 , wherein the first shielding region and the portion of the intrinsic base region each have an upper boundary below the emitter region.

13. The SiC BJT of claim 1 , wherein the first shielding region and the second shielding region laterally surround the portion of the intrinsic base region.

14. The unit cell of claim 9 , wherein the two shielding regions and the first portion of the active region each have an upper boundary below the third region.

15. The unit cell of claim 9 , wherein the two shielding regions are thicker than the first portion of the active region.

16. The unit cell of claim 9 , wherein the two shielding regions laterally surround the first portion of the active region, the active region is in contact with the third region.

17. The unit cell of claim 9 , wherein the first portion of the active region is laterally spaced away from the outer sidewall of the third region by a portion of at least one of the two shielding regions.

18. The SiC BJT of claim 1 , wherein the first shielding region has a dopant level at an interface with the intrinsic base region greater than a dopant level of the Portion of the intrinsic base region.

19. The unit cell of claim 9 , wherein each of the two shielding regions extend further down in the stack than any point of the first portion of the active region by the distance corresponding to about 40% to 60% of the width of the channel portion of the first region disposed between the two shielding regions.

20. The SiC BJT of claim 10 , wherein the two shielding regions and the portion of the intrinsic base region define an interface with a bottom surface of the emitter region.

21. The SiC BJT of claim 10 , wherein the collector region has a portion defining a channel portion in the collector region and separating the two shielding regions below the portion of the intrinsic base region, at least one of the two shielding regions has a dopant level at an interface with the channel portion greater than a dopant level of the portion of the intrinsic base region.

Assignees

• Fairchild Semiconductor

Inventors

• Konstantinov Andrei

Classifications

• H10P32/172 Primary

  being crystalline silicon carbide · CPC title

• H10D10/40

  Vertical BJTs {(Vertical Heterojunction BJTs H10D10/821)} · CPC title

• H10D62/8325

  Silicon carbide · CPC title

• H10D62/405 Primary

  Orientations of crystalline planes · CPC title

• H10D62/177

  Base regions of bipolar transistors, e.g. BJTs or IGBTs · CPC title