Microelectronic package having direct contact heat spreader and method of manufacturing same

US9508675B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9508675-B2
Application numberUS-201313973975-A
CountryUS
Kind codeB2
Filing dateAug 22, 2013
Priority dateSep 30, 2005
Publication dateNov 29, 2016
Grant dateNov 29, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of fabricating a microelectronic package comprising: providing a die having an active surface and a backside; bonding the die to a die-side of a microelectronic substrate at the active surface of the die, the microelectronic substrate having a landside opposite the die-side; forming an encapsulant around the die, the encapsulant having a top surface co-planar with the backside of the die; and subsequent to forming the encapsulant, forming a heat spreader body directly on the entire backside of the die and on the top surface of the encapsulant, wherein the entire heat spreader body is formed by a metallization process, the heat spreader body directly contacting and fixed to the entire backside of the die and to the top surface of the encapsulant and having a thickness greater than 0.2 mm. 2. The method of claim 1 , wherein bonding is performed prior to metallizing. 3. The method of claim 1 , wherein bonding is performed after metallizing. 4. The method of claim 1 , wherein the metallization process comprises at least one of electroless plating, electrolytic plating, plating bonding, sputtering, chemical vapor deposition or evaporation. 5. The method of claim 1 , wherein the metallization process comprises plating including: providing a conductive seed layer at the backside of the die; and providing an electroplated layer onto the seed layer to form the heat spreader body. 6. The method of claim 5 , wherein providing a conductive seed layer comprising one of electrolessly plating or sputtering the seed layer at the backside of the die. 7. The method of claim 1 , wherein the metallization process comprises metallizing using at least one of copper, a copper alloy, a copper laminate, a copper composite, aluminum or an aluminum alloy. 8. The method of claim 1 , wherein the metallization process comprises using a metal composite material comprising a metal and particles having a thermal conductivity above that of the metal. 9. The method of claim 8 , wherein the particles comprises diamond particles. 10. The method of claim 1 , further comprising providing a protective mask on the landside of the microelectronic substrate to protect the landside of the microelectronic substrate during metallization. 11. The method of claim 10 , further comprising bonding at least one surface mount component onto the landside of the microelectronic substrate. 12. The method of claim 11 , wherein providing a protective mask comprises providing the mask on a backside of the at least one surface mount component to protect the backside of the at least one surface mount component during metallization. 13. The method of claim 1 , wherein bonding comprises: forming solder joints between the active surface of the die and the die-side of the microelectronic substrate; and forming at least one of the encapsulant or an underfill material in a gap between the active surface of the die and the die-side of the microelectronic substrate. 14. The method of claim 13 , further comprising planarizing a backside of the die before forming the heat spreader body. 15. The method of claim 1 , wherein the heat spreader body includes a microchannel structure, the method further comprising providing a cover piece onto the microchannel structure. 16. The method of claim 1 , further comprising attaching a heat sink onto the heat spreader body using a thermal interface material. 17. A method of fabricating a microelectronic package comprising: providing a semiconductor wafer having a plurality of unsingulated die formed thereon, each of the unsingulated die having an active surface and a backside surface; forming a heat spreader body directly on the entire backside of each said plurality of unsingulated die by a metallization process, the heat spreader body directly contacting the entire backside of the unsingulated die and having a thickness greater than 0.2 mm; singulating the wafer into a plurality of individual die-heat spreader combinations; and bonding the active surface of one of said individual die-heat spreader combinations to a die side of a substrate. 18. The method of claim 17 wherein said metallization process comprises forming a seed layer on the backside of the plurality of unsingulated die; and electroplating a conductive layer on said seed layer. 19. The method of claim 18 wherein said electroplating occurs at room temperature. 20. The method of claim 18 wherein the metallization comprises copper. 21. The method of claim 17 further comprising forming a thermal interface material on the heat spreader body of said die-heat spreader combination and forming a heat spreader on said thermal interface material and on said substrate. 22. A method of fabricating a microelectronic package comprising: providing an die having an active surface and a backside; bonding the die to the die side of the substrate at the active surface of the die; forming a conductive seed layer on the backside of the die; positioning a flat metal piece onto the seed layer, the flat metal piece having pedestals on a die side surface thereof to create a gap between the die side of the metal piece and the backside of the die, wherein the pedestals have a flat bottom surface parallel to a bottom surface of the flat metal piece; and electroplating an electroplating layer onto the seed layer to form heat spreader body in the gap between the backside of the die and the metal piece. 23. The method of claim 22 wherein forming the conductive seed layer comprises one of electrolessly plating or sputtering the seed layer at the backside of the die. 24. The method of claim 22 wherein said flat metal piece comprises copper. 25. The method of claim 22 wherein said heat spreader body bonds said metal piece to said die. 26. The method of claim 22 further comprising forming a encapsulate material on said substrate around said die and substantially planar with the backside of said die. 27. The method of claim 26 further comprising forming said conductive seed layer on said encapsulate material and forming said heat spreader body on said conductive layer on said encapsulate material.

Assignees

Inventors

Classifications

  • the encapsulations exposing the passive side of the semiconductor body · CPC title

  • Bump connectors and die-attach connectors · CPC title

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

  • of die-attach connectors · CPC title

  • Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

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What does patent US9508675B2 cover?
A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yi…
Who is the assignee on this patent?
Lu Daoqiang, Hu Chuan, Vandentop Gilroy J, and 4 more
What technology area does this patent fall under?
Primary CPC classification H10W70/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).