Method for forming MEMS structure with an etch stop layer buried within inter-dielectric layer

Patent metadata

Field	Value
Publication number	US-9499399-B2
Application number	US-201313917655-A
Country	US
Kind code	B2
Filing date	Jun 14, 2013
Priority date	Jun 14, 2013
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

A method of forming a MEMS structure, in which an etch stop layer is formed to be buried within the inter-dielectric layer and, during an etch of the substrate and the inter-dielectric layer from backside to form a chamber, the etch stop layer protect the remaining inter-dielectric layer. The chamber thus formed has an opening at a backside of the substrate, a ceiling opposite to the opening, and a sidewall joining the ceiling. The sidewall may further include a portion of the etch stop layer.

First claim

What is claimed is:

1. A method of forming a MEMS structure, comprising:
forming a metal structure and an inter-dielectric layer on a front side of a substrate, a first etch stop layer buried within the inter-dielectric layer and contacting the metal structure directly while the inter-dielectric layer surrounds the sidewalls and top surface of the first etch stop layer, and a MEMS component on the first etch stop layer;
grinding the backside of the substrate; and
etching the substrate and the inter-dielectric layer to stop at the first etch stop layer to form a chamber; and
removing part of the first etch stop layer after removing part of the substrate and part of the inter-dielectric layer to expose a bottom surface of the inter-dielectric layer.

2. The method of forming a MEMS structure according to claim 1 , wherein, the metal structure comprises a top metal layer, a bottom metal layer and a metal layer between the top metal layer and the bottom metal layer, and the first etch stop layer is formed to extend onto the top metal layer.

3. The method of forming a MEMS structure according to claim 1 , wherein, the metal structure comprises a first metal layer, a second metal layer, a third metal layer, a fourth metal layer, a fifth metal layer and a sixth metal layer in the order from bottom to top, and the first etch stop layer is formed to extend onto the third or fourth metal layer.

4. The method of forming a MEMS structure according to claim 1 , wherein, an opening is formed to pass through the first etch stop layer by etching the first etch stop layer to partially remove the first etch stop layer.

5. The method of forming a MEMS structure according to claim 1 , wherein, the step of etching the substrate and the inter-dielectric layer to stop at the first etch stop layer to form the chamber comprises a plurality of anisotropic etch processes performed in a same etching chamber.

6. The method of forming a MEMS structure according to claim 1 , wherein, the MEMS component comprises a metal diaphragm for storing charges.

7. The method of forming a MEMS structure according to claim 1 , wherein, the MEMS component comprises a conductive electrode structure.

8. The method of forming a MEMS structure according to claim 1 , further comprising forming a second etch stop layer on the first etch stop layer, wherein an etch selectivity of the first etch stop layer to the second etch stop layer is greater than 1.

9. The method of forming a MEMS structure according to claim 8 , wherein, the first etch stop layer is etched and partially removed so as to form an opening exposing the second etch stop layer.

10. The method of forming a MEMS structure according to claim 8 , further comprising performing a wet cleaning process, wherein the second etch stop layer protects the inter-dielectric layer during the wet cleaning process.

Assignees

• United Microelectronics Corp

Inventors

• Chen Li-Che
• Wu Te-Yuan
• Lin Chia-Huei
• Wu Hui-Min
• Hsieh Kun-Che
• Wang Kuan-Yu
• Chiu Chung-Yi

Classifications

• B81C2203/0735

  Post-CMOS, i.e. forming the micromechanical structure after the CMOS circuit · CPC title

• B81C2203/0714

  Forming the micromechanical structure with a CMOS process · CPC title

• B81C1/00801 Primary

  Avoid alteration of functional structures by etching, e.g. using a passivation layer or an etch stop layer (B81C1/00595, B81C1/00468 take precedence) · CPC title

• B81C2201/014

  by depositing an etch stop layer, e.g. silicon nitride, silicon oxide, metal · CPC title

• B81C1/00246

  Monolithic integration, i.e. micromechanical structure and electronic processing unit are integrated on the same substrate · CPC title