Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion

Patent metadata

Field	Value
Publication number	US-9484402-B2
Application number	US-201514662743-A
Country	US
Kind code	B2
Filing date	Mar 19, 2015
Priority date	Oct 15, 2013
Publication date	Nov 1, 2016
Grant date	Nov 1, 2016

Abstract

A method is disclosed for forming a semiconductor device. A first opening is formed for an STI on a semiconductor substrate and a first process is performed to deposit first oxide into the first opening. A second opening is formed to remove a portion of the first oxide from the first opening and second process(es) is/are performed to deposit second oxide into the second opening and over a remaining portion of the first oxide. A portion of the semiconductor device is formed over a portion of a surface of the second oxide. A semiconductor device includes an STI including a first oxide formed in a lower portion of a trench of the STI and a second oxide formed in an upper portion of the trench and above the first oxide. The semiconductor device includes a portion of the semiconductor device formed over a portion of the second oxide.

First claim

What is claimed is:

1. A method for forming a semiconductor device comprising a shallow trench isolation, comprising:
forming a first opening for the shallow trench isolation on a semiconductor substrate;
performing a first process to deposit first oxide into the first opening;
forming a second opening to remove a portion of the first oxide from the first opening;
performing at least one second process to deposit second oxide into the second opening and over a remaining portion of the first oxide, the at least one second process being performed such that the second oxide has a lower oxygen concentration than the first oxide; and
forming at least a portion of the semiconductor device over and contacting at least a portion of a surface of the second oxide.

2. The method of claim 1 , wherein the first process is a high aspect-ratio process and the at least one second process is a high-density plasma chemical vapor deposition process.

3. The method of claim 1 , wherein:
the method further comprises, prior to performing the first process, forming a liner at least partially conforming to interior surfaces of the first opening, wherein the liner at least partially encases sides of the first oxide after the first process is performed to deposit the first oxide into the first opening;
forming the second opening further comprises forming the second opening to remove, from the first opening, the portion of the first oxide and a corresponding portion of the liner that previously encased the sides of the portion of the first oxide; and
performing the at least one second process further comprises performing the at least one second process to deposit the second oxide over a remaining portion of the first oxide and a remaining portion of the liner.

4. The method of claim 3 , wherein the first process is a high aspect-ratio process and the at least one second process is a high-density plasma chemical vapor deposition process and wherein the liner comprises a high-k material.

5. The method of claim 3 , wherein the liner comprises at least one of an oxygen sink or an oxygen barrier.

6. The method of claim 5 , wherein the first process is a high aspect-ratio process and the at least one second process is a high-density plasma chemical vapor deposition process.

7. The method of claim 5 , wherein the first process is a high aspect-ratio process and the at least one second process is one or both of a high aspect-ratio process or a high-density plasma chemical vapor deposition process.

8. The method of claim 5 , wherein the liner comprises at least one of HfO 2 , HfSiO 4 , or SiN.

9. The method of claim 1 , wherein:
the method further comprises, after forming of the second opening and prior to performing the at least one second process, forming a liner at least partially conforming to interior surfaces of the second opening and a top surface of a remaining portion of the first oxide, wherein the liner at least partially encases sides of the second oxide after the second oxide is deposited by a high-density plasma chemical vapor deposition process.

10. The method of claim 9 , wherein the first process is a high aspect-ratio process and the at least one second process is a high-density plasma chemical vapor deposition process and wherein the liner comprises a high-k material.

11. The method of claim 9 , wherein the liner comprises at least one of an oxygen sink or an oxygen barrier.

12. The method of claim 11 , wherein the first process is a high aspect-ratio process and the at least one second process is a high-density plasma chemical vapor deposition process.

13. The method of claim 11 , wherein the liner comprises at least one of HfO 2 , HfSiO 4 , or SiN.

14. The method of claim 11 , wherein the first process is a high aspect-ratio process and the at least one second process is one or both of a high aspect-ratio process or high-density plasma chemical vapor deposition process.

15. The method of claim 1 , wherein the portion of the semiconductor device comprises a high dielectric constant metal gate.

16. The method of claim 1 , wherein the semiconductor substrate comprises one of a silicon-on-insulator substrate or a bulk silicon substrate.

17. A method for forming a semiconductor device comprising a shallow trench isolation, comprising:
forming a first opening for the shallow trench isolation in a semiconductor substrate;
performing a first process to deposit first oxide into the first opening;
forming a second opening to remove a portion of the first oxide from the first opening;
performing at least one second process to deposit second oxide into the second opening and over a remaining portion of the first oxide; and
forming a portion of the semiconductor device such that the portion of the semiconductor device completely traverses the first opening and is formed over and contacting a portion of an essentially planar top surface of the second oxide that extends from adjacent to a first side of the first opening to adjacent to a second side of the second opening opposite the first side.

18. The method of claim 17 , the at least one second process being performed such that the second oxide has a lower oxygen concentration than the first oxide.

19. The method of claim 17 , the portion of the semiconductor device comprising a high dielectric constant metal gate.

20. The method of claim 17 , the portion of the semiconductor device further being formed so as to completely traverse regions of the semiconductor substrate on opposite sides of the first opening.

Assignees

• Globalfoundries Inc

Inventors

• Cai Ming
• Guo Dechao
• Song Liyang
• Yeh Chun-Chen

Classifications

• H10W10/17

  formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10W10/014 Primary

  using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

• H10D64/691

  comprising metallic compounds, e.g. metal oxides or metal silicates  (insulators comprising nitrogen H10D64/693) · CPC title

• H10D30/795

  being in lateral device isolation regions, e.g. STI · CPC title

• H10D62/115 Primary

  Dielectric isolations, e.g. air gaps · CPC title