System and method for sub-seasonal forecasts of extreme weather events in winter
US-10197706-B1 · Feb 5, 2019 · US
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Cai Ming patents
Cai Ming is listed as an inventor on 23 patents in our database. Major assignees and classification codes are summarized below.
| Metric | Value |
|---|---|
| Inventor | Cai Ming |
| Total patents | 23 |
| First publication | Jan 1, 2015 |
| Latest publication | Feb 5, 2019 |
Notable patents
Publications ranked by popularity score, then publication date.
Structure and method to form passive devices in ETSOI process flow
US-9570466-B2 · Feb 14, 2017 · US
Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion
US-9484402-B2 · Nov 1, 2016 · US
System and method of varying gate lengths of multiple cores
US-9461040-B2 · Oct 4, 2016 · US
Vertical tunnel field effect transistor
US-9425296-B2 · Aug 23, 2016 · US
Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion
US-9397158-B2 · Jul 19, 2016 · US
Semiconductor device having high mobility channel
US-9245971-B2 · Jan 26, 2016 · US
Method and apparatus for 3d concurrent multiple parallel 2d quantum wells
US-2016013306-A1 · Jan 14, 2016 · US
Method and apparatus for 3d concurrent multiple parallel 2d quantum wells
US-2016005849-A1 · Jan 7, 2016 · US
System and method of varying gate lengths of multiple cores
US-2015311198-A1 · Oct 29, 2015 · US
Recent patents
Latest publications not already listed above.
Fabricating Shallow-Trench Isolation Semiconductor Devices To Reduce Or Eliminate Oxygen Diffusion
US-2015194484-A1 · Jul 9, 2015 · US
Fabricating Shallow-Trench Isolation Semiconductor Devices To Reduce Or Eliminate Oxygen Diffusion
US-2015194334-A1 · Jul 9, 2015 · US
System and method of varying gate lengths of multiple cores
US-9076775-B2 · Jul 7, 2015 · US
Fabricating shallow-trench isolation semiconductor devices to reduce or eliminate oxygen diffusion
US-9059244-B2 · Jun 16, 2015 · US
Threshold voltage adjustment for thin body MOSFETs
US-9040399-B2 · May 26, 2015 · US
Fabricating Shallow-Trench Isolation Semiconductor Devices To Reduce Or Eliminate Oxygen Diffusion
US-2015102453-A1 · Apr 16, 2015 · US
Semiconductor device having high mobility channel
US-2015091060-A1 · Apr 2, 2015 · US
Vertical tunnel field effect transistor
US-2015069458-A1 · Mar 12, 2015 · US
System and method of varying gate lengths of multiple cores
US-2015061037-A1 · Mar 5, 2015 · US
Transistors with uniaxial stress channels
US-8957464-B2 · Feb 17, 2015 · US
Structure and method of high-performance extremely thin silicon on insulator complementary metal—oxide—semiconductor transistors with dual stress buried insulators
US-8927364-B2 · Jan 6, 2015 · US
Cmos technology integration
US-2015001631-A1 · Jan 1, 2015 · US
Structure and method of high-performance extremely thin silicon on insulator complementary metal-oxide-semiconductor transistors with dual stress buried insulators
US-2015001625-A1 · Jan 1, 2015 · US
Major assignees
Companies most often associated with this inventor's publications.
| Assignee | Patents |
|---|---|
| Qualcomm Inc | 11 |
| IBM | 8 |
| Globalfoundries Inc | 3 |
| Cai Ming | 2 |
| Guo Dechao | 2 |
Top CPC classifications
Most common classification codes across this inventor's patents.
| CPC | Patents |
|---|---|
| H10W10/17 | 11 |
| H10W10/014 | 11 |
| H10D64/691 | 10 |
| H10D84/038 | 10 |
| H01L21/76224 | 8 |