Semiconductor devices and methods of manufacturing the same

US9466805B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9466805-B2
Application numberUS-201113242478-A
CountryUS
Kind codeB2
Filing dateSep 23, 2011
Priority dateApr 8, 2011
Publication dateOct 11, 2016
Grant dateOct 11, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

According to example embodiments, a semiconductor device includes a first electrode, a second electrode apart from the first electrode, and an active layer between the first and second electrodes. The active layer includes first and second layers, the first layer contacts the first and second electrodes, and the second layer is separated from at least one of the first and second electrodes.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a first electrode on a supporting layer; a second electrode apart from the first electrode on the supporting layer; and an active layer between the first and second electrodes, wherein the active layer includes first and second layers, a portion of the first layer overlapping at least a portion of a sidewall of the first and second electrodes, the entire second layer being separated from at least one of the first and second electrodes by a gap, and the first layer covering an upper surface and side surfaces of the second layer in contact with the supporting laver. 2. The semiconductor device of claim 1 , wherein the first layer comprises an organic semiconductor. 3. The semiconductor device of claim 1 , wherein the second layer comprises a material having higher electrical conductivity than the first layer. 4. The semiconductor device of claim 1 , wherein the second layer comprises a material having higher charge mobility than the first layer. 5. The semiconductor device of claim 1 , wherein the second layer comprises a metallic layer or a semiconductor layer. 6. The semiconductor device of claim 5 , wherein the second layer comprises at least one selected from the group consisting of graphene, silver (Au), copper (Cu), nickel (Ni), platinum (Pt), and molybdenum disulphide (MoS 2 ). 7. The semiconductor device of claim 1 , wherein the first layer and the second layer are in ohmic contact with each other. 8. The semiconductor device of claim 1 , wherein a portion of the first layer is between the second layer and at least one of the first and second electrodes. 9. The semiconductor device of claim 1 , further comprising: a gate configured to apply an electric field to the active layer. 10. The semiconductor device of claim 9 , wherein the second layer is closer to the gate compared to the first layer. 11. The semiconductor device of claim 9 , wherein the gate is below the active layer. 12. The semiconductor device of claim 9 , wherein the gate is above the active layer. 13. The semiconductor device of claim 1 , wherein the first and second electrodes contact a lower surface portion of the first layer. 14. The semiconductor device of claim 1 , wherein the first and second electrodes contact an upper surface portion of the first layer. 15. The semiconductor device of claim 1 , wherein the gap between the second layer and at least one of the first and second electrodes is less than several tens of micrometers (μm). 16. The semiconductor device of claim 15 , wherein, when the second layer is at a same level as the first and second electrodes, the gap between the second layer and at least one of the first and second electrodes is in a range of several hundreds of nanometers (nm) to several tens of micrometers (μm). 17. The semiconductor device of claim 15 , wherein, when the second layer is at a different level than the first and second electrodes, the gap between the second layer and at least of the first and second electrodes is in a range of several tens of nanometers (nm) to several micrometers (μm). 18. The semiconductor device of claim 1 , wherein the semiconductor device is flexible. 19. The semiconductor device of claim 1 , wherein the semiconductor device is a sensor. 20. The semiconductor device of claim 19 , wherein the sensor is a chemical sensor or an optical sensor. 21. The semiconductor device of claim 9 , wherein the semiconductor device is a switching device or a sensor. 22. The semiconductor device of claim 9 , wherein the semiconductor device is a thin film transistor. 23. A transistor comprising: a source and a drain separated from each other; a channel layer between the source and the drain; and a gate configured to apply an electric field to the channel layer, wherein the channel layer is a multi-layer structure including a first layer and a second layer on a supporting layer, a portion of the first layer overlapping at least a portion of a sidewall of the source and the drain, the first layer including an organic semiconductor, the second layer including a material having higher electrical conductivity than the organic semiconductor, the entire second layer being separated from at least one of the source and the drain by a gap, and the first layer covering an upper surface and side surfaces of the second layer in contact with the supporting layer. 24. The transistor of claim 23 , wherein the second layer is closer to the gate compared to the first layer. 25. The transistor of claim 23 , wherein the second layer is a metallic layer or a semiconductor layer. 26. The semiconductor device of claim 1 , wherein the first layer has a width greater than a gap between the first electrode and the second electrodc. 27. The semiconductor device of claim 1 , wherein the portion of the first layer overlaps at least a portion of an upper surface and sidewall of the first and second electrodes.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • Electricity · mapped topic

  • Electricity · mapped topic

  • H10K10/486Primary

    the channel region comprising two or more active layers, e.g. forming pn heterojunctions · CPC title

  • Lateral top-gate IGFETs comprising only a single gate · CPC title

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Frequently asked questions

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What does patent US9466805B2 cover?
According to example embodiments, a semiconductor device includes a first electrode, a second electrode apart from the first electrode, and an active layer between the first and second electrodes. The active layer includes first and second layers, the first layer contacts the first and second electrodes, and the second layer is separated from at least one of the first and second electrodes.
Who is the assignee on this patent?
Lee Jiyoul, Kim Eok-Su, Choi Won-Mook, and 2 more
What technology area does this patent fall under?
Primary CPC classification H01L51/0562. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 11 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).