Method of inspecting semiconductor device and method of fabricating semiconductor device using the same

US9466537B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9466537-B2
Application numberUS-201614988991-A
CountryUS
Kind codeB2
Filing dateJan 6, 2016
Priority dateJan 9, 2015
Publication dateOct 11, 2016
Grant dateOct 11, 2016

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  1. Title

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  5. First independent claim

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Abstract

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A method of inspecting a semiconductor device includes providing a substrate, on which a mold layer with a plurality of mold openings is provided, milling the mold layer in a direction inclined at a predetermined angle with respect to a direction normal to a top surface of the substrate, such that an inclined cutting surface exposing milled mold openings is formed, the milled mold openings including first milling openings along a first column extending in a first direction and having different heights, obtaining image data of the cutting surface, the image data including first contour images of the first milling openings, and obtaining a first process parameter, which represents an extent of bending of the mold openings according to a distance from a top surface of the substrate, using positions of center points of the first contour images.

First claim

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What is claimed is: 1. A method of inspecting a semiconductor device, the method comprising: providing a substrate, on which a mold layer with a plurality of mold openings is provided; milling the mold layer in a direction inclined at a predetermined angle with respect to a direction normal to a top surface of the substrate, such that an inclined cutting surface exposing milled mold openings is formed, the milled mold openings including first milling openings along a first column extending in a first direction and having different heights; obtaining image data of the inclined cutting surface, the image data including first contour images of the first milling openings; and obtaining a first process parameter, which represents an extent of bending of the mold openings according to a distance from a top surface of the substrate, using positions of center points of the first contour images. 2. The method as claimed in claim 1 , wherein obtaining the first process parameter includes: obtaining positions of the center points of the first contour images; establishing one of the first contour images as a reference contour image; and obtaining relative position values between the center points of the reference contour image and the first contour images. 3. The method as claimed in claim 2 , wherein: obtaining the relative position values between the center points includes obtaining differences between x coordinates of the center points of the reference contour image and the first contour images in an x-y coordinate system, and the first process parameter is obtained by using the differences. 4. The method as claimed in claim 1 , wherein: the milled mold openings further comprise second milling openings along a second column extending in the first direction and having different heights, the image data comprises includes second contour images of the second milling openings, and obtaining the first process parameter further comprises using positions of center points of the second contour images. 5. The method as claimed in claim 4 , wherein: the cutting surface includes a first edge and a second edge, which are opposite to and spaced laterally apart from each other and are adjacent to top and bottom surfaces, respectively, of the mold layer, and the first direction is directed from the first edge to the second edge, when viewed in plan view. 6. The method as claimed in claim 5 , wherein the second milling openings are spaced apart from the first milling openings in a second direction crossing the first direction, the first and second milling openings being arranged in a zigzag manner in the first direction, when viewed in plan view. 7. The method as claimed in claim 1 , further comprising obtaining a second process parameter, which represents dispersion in section shapes of the mold openings according to the distance from the top surface of the substrate, using contour lines of the first contour images. 8. The method as claimed in claim 7 , wherein obtaining the second process parameter includes obtaining at least one of: a first sub process parameter representing an extent of striation of the mold openings according to heights of the mold openings, a second sub process parameter representing an extent of bowing of the mold openings according to heights of the mold openings, or a third sub process parameter representing an extent of distortion of the mold openings according to heights of the mold openings. 9. The method as claimed in claim 8 , wherein obtaining the second process parameter includes obtaining the first sub process parameter, obtaining the first sub process parameter including: specifying a contour line of each of the first contour images; obtaining a comparative line from the contour line of each of the first contour images; and obtaining differences between the contour and comparative lines of each of the first contour images. 10. The method as claimed in claim 9 , wherein the comparative line is obtained by an ellipse fitting method. 11. The method as claimed in claim 8 , wherein obtaining the second process parameter includes obtaining the second sub process parameter, obtaining the second sub process parameter including: specifying a contour line of each of the first contour images; obtaining a comparative line from the contour line of each of the first contour images; and obtaining a longitudinal or traversal length of the comparative line of each of the first contour images. 12. The method as claimed in claim 11 , wherein obtaining the third sub process parameter includes calculating a difference or ratio between the longitudinal and traversal lengths. 13. The method as claimed in claim 1 , wherein the mold layer is a layer stack including first and second layers, which are alternately and repeatedly stacked one on top of the other and are formed of materials with an etch selectivity with respect to each other. 14. The method as claimed in claim 1 , wherein the mold openings are formed to have an aspect ratio ranging from about 1:5 to about 1:100. 15. A method of fabricating a semiconductor device, the method comprising: forming a mold layer on a substrate, the mold layer including sacrificial layers and insulating layers alternately and repeatedly stacked one on top of the other; forming a plurality of channel holes to penetrate the mold layer and expose the substrate; performing a first measurement on a resulting structure with the channel holes; forming channel structures in the channel holes; forming trenches to penetrate the mold layer and expose the sacrificial layers and insulating layers, the trenches being formed spaced apart from the channel structures; and replacing the sacrificial layers with gate electrodes, wherein the first measurement includes: milling a portion of the mold layer in a direction inclined at a predetermined angle with respect to a direction normal to a top surface of the substrate, such that an inclined cutting surface exposing milled channel holes is formed, the milled channel holes including first milling channel holes along a column and having different heights, obtaining image data of the inclined cutting surface, the image data including first contour images of the first milling channel holes, and obtaining process parameters containing information on three-dimensional structures of the channel holes using the first contour images. 16. A method of inspecting a semiconductor device, the method comprising: providing a substrate, the substrate including a mold layer thereon with a plurality of mold openings spaced apart from each other along a first direction; milling the mold layer in a direction obliquely inclined with respect to a direction normal to a top surface of the substrate, such that an inclined cutting surface exposing milled mold openings is formed; obtaining image data of the inclined cutting surface, the image data including first contour images of the milled mold openings; and obtaining a first process parameter using positions of center points of the first contour images, the first process parameter representing an extent of bending of the mold openings according to a distance from a top surface of the substrate. 17. The method as claimed in claim 16 , wherein milling the mold layer includes milling an entire top surface of the mold layer including the plurality of mold openings. 18. The method as claimed in claim 17 , wherein milling the mold layer includes milling the mold layer such that the plurality of milled mold openings along the first

Assignees

Inventors

Classifications

  • H10P74/203Primary

    Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • H01L22/12Primary

    Electricity · mapped topic

  • the channels comprising vertical portions, e.g. U-shaped channels · CPC title

  • characterised by the top-view layout · CPC title

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What does patent US9466537B2 cover?
A method of inspecting a semiconductor device includes providing a substrate, on which a mold layer with a plurality of mold openings is provided, milling the mold layer in a direction inclined at a predetermined angle with respect to a direction normal to a top surface of the substrate, such that an inclined cutting surface exposing milled mold openings is formed, the milled mold openings incl…
Who is the assignee on this patent?
Samsung Electronics Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10P74/203. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Oct 11 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).