Three-dimensional memory device including inclined word line contact strips and methods of forming the same
US-2024414916-A1 · Dec 12, 2024 · US
characterised by the top-view layout
characterised by the top-view layout · Cooperative Patent Classification (CPC)
Electric circuits, power, telecommunications, and semiconductors.
Related technology areas
Mapped technology topics for this CPC code.
| Metric | Value |
|---|---|
| CPC code | H10B43/10 |
| Official title | characterised by the top-view layout |
| Display label | characterised by the top-view layout |
| Total patents | 9,885 |
Filing trend
Year-over-year patent counts classified under this CPC code.
Filing activity over the last five years is stable.
| Year | Patents |
|---|---|
| 2015 | 183 |
| 2016 | 327 |
| 2017 | 418 |
| 2018 | 443 |
| 2019 | 668 |
| 2020 | 1,057 |
| 2021 | 1,214 |
| 2022 | 1,265 |
| 2023 | 1,232 |
| 2024 | 1,417 |
| 2025 | 1,277 |
| 2026 | 384 |
Representative patents
Representative publications under this CPC code from precomputed stats, or recent filings when stats are unavailable.
Memory devices having signal routing structures at bonding interfaces
US-2024404976-A1 · Dec 5, 2024 · US
Three-dimensional memory device and formation method thereof
US-2024407167-A1 · Dec 5, 2024 · US
Semiconductor memory device and manufacturing method of semiconductor memory device
US-12144179-B2 · Nov 12, 2024 · US
Semiconductor storage device and method for manufacturing semiconductor storage device
US-2024324208-A1 · Sep 26, 2024 · US
Semiconductor memory device
US-2024315058-A1 · Sep 19, 2024 · US
Semiconductor memory
US-2024296895-A1 · Sep 5, 2024 · US
Semiconductor devices and data storage systems including the same
US-2024297117-A1 · Sep 5, 2024 · US
Methods for forming contact structures and semiconductor devices thereof
US-2024282673-A1 · Aug 22, 2024 · US
Semiconductor integrated circuit device including split selection lines and method of manufacturing the semiconductor integrated circuit device
US-2024196613-A1 · Jun 13, 2024 · US
Semiconductor memory device and manufacturing method of the semiconductor memory device
US-2024172440-A1 · May 23, 2024 · US
Semiconductor devices and electronic systems including the same
US-2024147722-A1 · May 2, 2024 · US
Memory Arrays Comprising Strings Of Memory Cells And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells
US-2024138145-A1 · Apr 25, 2024 · US
Memory system, semiconductor device and fabrication method therefor
US-2024107759-A1 · Mar 28, 2024 · US
Semiconductor storage device
US-2024107765-A1 · Mar 28, 2024 · US
Vertical type non-volatile memory devices and methods of fabricating the same
US-2024074173-A1 · Feb 29, 2024 · US
Non-volatile memory device
US-2024055469-A1 · Feb 15, 2024 · US
Three-dimensional semiconductor memory device, electronic system including the same
US-2024040791-A1 · Feb 1, 2024 · US
Three dimensional nand device with channel contacting conductive source line and method of making thereof
US-2015380418-A1 · Dec 31, 2015 · US
Semiconductor memory device and method for manufacturing same
US-2015380428-A1 · Dec 31, 2015 · US
Frequently asked questions
Answers are generated from the same data shown on this page.
- What is CPC H10B43/10?
- CPC H10B43/10 is the Cooperative Patent Classification code for “characterised by the top-view layout.”
- How many patents are filed under CPC H10B43/10 (characterised by the top-view layout)?
- Our database includes 9,885 publications tagged with this CPC code.
- Is patent activity under CPC H10B43/10 growing?
- Publication counts under this code: 1,417 in 2024 vs 1,277 in 2025 (latest complete years).