Method for fabricating multiple transistor devices on a substrate with varying threshold voltages

US9406567B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9406567-B1
Application numberUS-201213407527-A
CountryUS
Kind codeB1
Filing dateFeb 28, 2012
Priority dateFeb 28, 2012
Publication dateAug 2, 2016
Grant dateAug 2, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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Abstract

Official abstract text for this publication.

Fabrication of a first device on a substrate is performed by exposing a first device region, removing a portion of the substrate to create a trench in the first device region, forming a screen layer with a first dopant concentration in the trench on the substrate, and forming an epitaxial channel on the screen layer having a first thickness. On or more other devices are similarly formed on the substrate independent of each other with epitaxial channels of different thicknesses than the first thickness. Devices with screen layers having the same dopant concentration but with different epitaxial channel thicknesses have different threshold voltages. Thus, a wide variety of threshold voltage devices can be formed on the same substrate. Further threshold voltage setting can be achieved through variations in the dopant concentration of the screen layers.

First claim

Opening claim text (preview).

What is claimed is: 1. A method for fabricating multiple transistor devices on a substrate with a plurality of threshold voltages, comprising: forming a first device in a substrate, the first device including a screen layer with a first dopant concentration, a threshold voltage layer with a second dopant concentration less than the first dopant concentration, and a substantially undoped epitaxial channel with a first thickness thereon, the screen layer, threshold voltage layer, and undoped epitaxial channel of the first device underlying a first gate; forming a second device in the substrate electrically isolated from the first device, the second device having a screen layer with a third dopant concentration, a threshold voltage layer with a fourth dopant concentration less than the third dopant concentration, and a substantially undoped epitaxial channel with a second thickness thereon, the screen layer, threshold voltage layer, and undoped epitaxial channel of the second device underlying a second gate, the second thickness being different than the first thickness such that the first and second devices have different threshold voltages; wherein a top surface of the substantially undoped epitaxial channel of the first device is substantially coplanar with a top surface of the substantially undoped epitaxial channel of the second device adjacent respective gates of the first and second devices. 2. The method of claim 1 , further comprising: forming a third device in the substrate, the third device having a screen layer with a third dopant concentration and a substantially undoped epitaxial channel with a third thickness thereon, the third thickness being different than the first and second thicknesses. 3. The method of claim 2 , wherein the first, second, and third dopant concentrations are substantially the same. 4. The method of claim 2 , further comprising: forming a fourth device in the substrate, the fourth device having a screen layer with a fourth dopant concentration and a substantially undoped epitaxial channel with a fourth thickness thereon. 5. The method of claim 4 , wherein the third dopant concentration is different than the fourth dopant concentration and wherein the third thickness and the fourth thickness are substantially the same. 6. The method of claim 5 , further comprising: simultaneously forming the substantially undoped epitaxial channel of the third and fourth devices. 7. The method of claim 1 , wherein the first and third dopant concentrations are the same. 8. The method of claim 1 , wherein the screen layer of the first device and the screen layer of the second device have substantially the same thickness. 9. The method of claim 1 , further comprising: forming shallow trench isolation regions in the substrate, the shallow trench isolating regions defining electrically separate device regions for formation of the first and second devices. 10. A method for fabricating multiple transistor devices on a substrate with a plurality of threshold voltages, comprising: forming a first device in a substrate, the first device including a screen layer with a first dopant concentration, a threshold voltage layer with a second dopant concentration less than the first dopant concentration, and a substantially undoped epitaxial channel with a first thickness thereon, the screen layer, threshold voltage layer, and undoped epitaxial channel of the first device underlying a first gate; forming a second device in the substrate electrically isolated from the first device, the second device having a screen layer with a third dopant concentration, a threshold voltage layer with a fourth dopant concentration less than the third dopant concentration, and a substantially undoped epitaxial channel with a second thickness thereon, the second thickness being different than the first thickness such that the first and second devices have different threshold voltages, the screen layer, threshold voltage layer, and undoped epitaxial channel of the second device underlying a second gate, wherein a top surface of the substantially undoped epitaxial channel of the first device is substantially coplanar with a top surface of the substantially undoped epitaxial channel of the second device adjacent respective gates of the first and second devices; and forming a third device in the substrate electrically isolated from the first device, the third device having a threshold voltage that is set using a method that does not include a screen layer. 11. A method for fabricating multiple transistor devices on a substrate with a plurality of threshold voltages, comprising: forming a first device in a substrate, the first device including a screen layer with a first dopant concentration and a substantially undoped epitaxial channel with a first thickness thereon; forming a second device in the substrate electrically isolated from the first device, the second device having a screen layer with a first dopant concentration and a substantially undoped epitaxial channel with a second thickness thereon, the second thickness being different than the first thickness such that the first and second devices have different threshold voltages; and forming a third device in the substrate electrically isolated from the first device, the third device having a threshold voltage that is set using a method that does not include a substantially undoped epitaxial channel. 12. The method of claim 9 , wherein the forming shallow trench isolation regions in the substrate is done before forming the first device and forming the second device.

Assignees

Inventors

Classifications

  • Manufacturing their doped wells · CPC title

  • Manufacturing their doped wells · CPC title

  • Manufacturing their channels · CPC title

  • Manufacturing their channels · CPC title

  • H10D84/038Primary

    using silicon technology, e.g. SiGe · CPC title

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What does patent US9406567B1 cover?
Fabrication of a first device on a substrate is performed by exposing a first device region, removing a portion of the substrate to create a trench in the first device region, forming a screen layer with a first dopant concentration in the trench on the substrate, and forming an epitaxial channel on the screen layer having a first thickness. On or more other devices are similarly formed on the …
Who is the assignee on this patent?
Shifren Lucian, Ranade Pushkar, Hoffmann Thomas, and 2 more
What technology area does this patent fall under?
Primary CPC classification H10D84/0167. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Aug 02 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).