Interconnect structure for CIS flip-chip bonding and methods for forming the same

Patent metadata

Field	Value
Publication number	US-9397137-B2
Application number	US-201414530214-A
Country	US
Kind code	B2
Filing date	Oct 31, 2014
Priority date	Jul 11, 2012
Publication date	Jul 19, 2016
Grant date	Jul 19, 2016

Abstract

A device includes a metal pad at a surface of an image sensor chip, wherein the image sensor chip includes an image sensor. A stud bump is disposed over, and electrically connected to, the metal pad. The stud bump includes a bump region, and a tail region connected to the bump region. The tail region includes a metal wire portion substantially perpendicular to a top surface of the metal pad. The tail region is short enough to support itself against gravity.

First claim

The invention claimed is:

1. A method comprising:
forming a stud bump on a surface of an image sensor chip, wherein the stud bump comprises a bump region, and a tail region connected to the bump region, and wherein the tail region is short enough to support itself against gravity; and
bonding a substrate to the image sensor chip through the stud bump, wherein the substrate comprises:
a first portion overlapping a portion of the image sensor chip, wherein the first portion of the substrate comprises an electrical connector in contact with the tail region of the stud bump; and
a second portion connected to the first portion, wherein the second portion extends along sidewalls of the image sensor chip and comprises a lower end level with a bottom surface of the image sensor chip.

2. The method of claim 1 further comprising, before the bonding, forming a solder layer on a metal pad of the image sensor chip, with the stud bump formed over and in contact with the solder layer.

3. The method of claim 2 , wherein the forming the stud bump comprises:
bonding a metal wire on the solder layer to form the bump region; and
cutting the metal wire, with a portion of the metal wire attached to the bump region after the cutting, wherein the portion of the metal wire forms the tail region.

4. The method of claim 3 , wherein after the cutting, the tail region has a lengthwise direction perpendicular to a top surface of the metal pad.

5. The method of claim 2 , wherein the metal pad comprises a metal finish, and the solder layer is formed on the metal finish.

6. The method of claim 5 , wherein the metal pad further comprises an aluminum containing pad underlying the metal finish.

7. The method of claim 1 , wherein the electrical connector of the substrate further comprises an additional solder layer, and wherein during the bonding, the tail region is put to contact with the additional solder layer, and heated to a temperature lower than a melting temperature of the additional solder layer.

8. The method of claim 1 , wherein the stud bump is formed on a backside of the image sensor chip.

9. A method comprising:
forming a solder layer over a metal pad of an image sensor chip, wherein the image sensor chip comprises:
a semiconductor substrate; and
an image sensor at a first side of the semiconductor substrate, wherein the metal pad is disposed on a second side of the semiconductor substrate opposing the first side; and

forming a stud bump over the solder layer and electrically coupled to the metal pad through the solder layer, wherein the stud bump comprises a bump region, and a tail region comprising a metal wire portion having a substantially uniform size attached to the bump region, and wherein the stud bump and the solder layer are formed on a backside of the image sensor chip.

10. The method of claim 9 , wherein the image sensor chip comprises:
a semiconductor substrate; and
an image sensor at a front side of the semiconductor substrate, wherein the image sensor chip is configured to allow the image sensor to receive light from the backside of the image sensor chip.

11. The method of claim 9 , wherein the metal wire portion is substantially perpendicular to a top surface of the metal pad, and is short enough to support itself against gravity.

12. The method of claim 9 , wherein the bump region contacts the solder layer, and a first end of the tail region contacts the bump region, and an entirety of the tail region between the first end an a second end of the tail region extends in a direction substantially perpendicular to a major surface of the solder layer.

13. The method of claim 9 further comprising bonding a substrate to the image sensor chip through the stud bump, wherein the substrate comprises:
a first portion overlapping a portion of the image sensor chip, wherein the first portion of the substrate comprises an electrical connector in contact with the tail region of the stud bump; and
a second portion connected to the first portion, wherein the second portion comprises a lower end level with a bottom surface of the image sensor chip.

14. The method of claim 13 , wherein the electrical connector of the substrate comprises an additional solder layer in contact with the tail region of the stud bump.

15. The method of claim 13 , wherein the bonding the substrate comprises aligning a window of the substrate to image sensors of the image sensor chip, with a glass cover covering the window of the substrate.

16. The method of claim 13 further comprising attaching a printed circuit board to the image sensor chip and a lower end of the second portion of the substrate, wherein the substrate further comprises a metal trace connecting the electrical connector of the first portion of the substrate to the printed circuit board.

17. A method comprising:
forming a stud bump on a surface of an image sensor chip, wherein the stud bump comprises a bump region, and a tail region connected to the bump region, wherein the tail region is short enough to support itself against gravity; and
bonding a substrate to the image sensor chip through the stud bump, wherein the substrate comprises:
a first portion overlapping a portion of the image sensor chip, wherein the first portion of the substrate comprises:
a bottom surface facing the tail region; and
an electrical connector protruding below the bottom surface, wherein the electrical connector is in contact with and is wider than the tail region of the stud bump.

18. The method of claim 17 , wherein the substrate further comprises a second portion connected to the first portion, wherein after the bonding the substrate, the second portion comprises a lower end level with a bottom surface of the image sensor chip.

19. The method of claim 17 , wherein the electrical connector of the substrate further comprises an additional solder layer, and wherein during the bonding, the tail region is put to contact with the additional solder layer, and heated to a temperature lower than a melting temperature pf the additional solder layer.

20. The method of claim 17 further comprising, before the bonding, forming a solder layer on a metal pad of the image sensor chip, with the stud bump formed on the solder layer.

Assignees

• Taiwan Semiconductor Mfg

Inventors

• Yu Chen-Hua
• Chen Yung Ching
• Lee Chien-Hsun
• Lii Mirng-Ji

Classifications

• H10W72/20 Primary

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H10F77/93

  Interconnections · CPC title

• H10F39/8063

  Microlenses · CPC title

• H10F39/8053

  Colour filters · CPC title

• H10F39/811

  Interconnections · CPC title