Soft landing nanolaminates for advanced patterning

US9390909B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9390909-B2
Application numberUS-201414194324-A
CountryUS
Kind codeB2
Filing dateFeb 28, 2014
Priority dateNov 7, 2013
Publication dateJul 12, 2016
Grant dateJul 12, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Methods for depositing nanolaminate protective layers over a core layer to enable deposition of high quality conformal films over the core layer for use in advanced multiple patterning schemes are provided. In certain embodiments, the methods involve depositing a thin silicon oxide or titanium oxide film using plasma-based atomic layer deposition techniques with a low high frequency radio frequency (HFRF) plasma power, followed by depositing a conformal titanium oxide film or spacer with a high HFRF plasma power.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of processing a semiconductor substrate, the method comprising: depositing a nanolaminate layer on the substrate; and depositing a titanium oxide layer on the nanolaminate layer, the nanolaminate layer having a thickness of between about 15 Å and about 200 Å and a density lower than the density of the titanium oxide layer. 2. The method of claim 1 , further comprising depositing an amorphous carbon layer, wherein the nanolaminate layer is deposited on the amorphous carbon layer. 3. The method of claim 2 , wherein the amorphous carbon layer is a patterned layer. 4. The method of claim 1 , wherein the nanolaminate layer comprises a stack comprising two or more sublayers. 5. The method of claim 4 , wherein the two or more sublayers each comprise silicon oxide, or titanium oxide, or combinations thereof. 6. The method of claim 4 , wherein the stack comprises no more than two sublayers. 7. The method of claim 6 , wherein the nanolaminate layer comprises a first sublayer of silicon oxide and a second sublayer of titanium oxide. 8. The method of claim 1 , wherein the nanolaminate layer comprises silicon oxide or titanium oxide. 9. The method of claim 1 , wherein the nanolaminate layer is deposited using plasma-enhanced atomic layer deposition (PEALD) by: exposing the substrate to a titanium-containing precursor or a silicon-containing precursor; exposing the substrate to an oxidant; and initiating a plasma while the substrate is exposed to the oxidant. 10. The method of claim 9 , wherein the nanolaminate layer is deposited at a temperature between about 50° C. and about 150° C. and the plasma is initiated at a high frequency radio frequency (HFRF) power per square millimeter of substrate area between about 1.768×10 −4 W per mm 2 and about 1.768×10 −3 W per mm 2 . 11. The method of claim 9 , wherein the nanolaminate layer is deposited at a temperature less than about 100° C. 12. The method of claim 9 , wherein the titanium-containing precursor comprises TDMAT. 13. The method of claim 1 , wherein the titanium oxide layer is deposited by PEALD by: exposing the substrate to a titanium-containing precursor; exposing the substrate to an oxidant; and initiating a plasma while the substrate is exposed to the oxidant at a HFRF power per square millimeter of substrate area of at least about 1.768×10 −3 W per mm 2 . 14. The method of claim 13 , wherein the oxidant comprises nitrous oxide or oxygen or carbon dioxide or a mixture thereof. 15. The method of claim 13 , wherein the titanium-containing precursor comprises TDMAT. 16. The method of claim 13 , wherein the titanium oxide layer is deposited at a pressure between about 3 Torr and about 3.5 Torr. 17. The method of claim 13 , wherein the titanium oxide layer is deposited at a temperature between about 50° C. and about 400° C. 18. A method of processing a semiconductor substrate, the method comprising: (a) exposing the substrate to a first titanium-containing precursor or a silicon-containing precursor; (b) exposing the substrate to a first oxidant; (c) initiating a first plasma while the substrate is exposed to the first oxidant with a HFRF power per square millimeter of substrate area between about 1.768×10 −4 W per mm 2 and about 1.768×10 −3 W per mm 2 ; (d) exposing the substrate to a second titanium-containing precursor; (e) exposing the substrate to a second oxidant; and (f) initiating a second plasma while the substrate is exposed to the second oxidant with a HFRF power per square millimeter of substrate area of at least about 1.768×10 −3 W per mm 2 .

Assignees

Inventors

Classifications

  • characterised by their composition, e.g. multilayer masks · CPC title

  • H10P76/204Primary

    of organic photoresist masks · CPC title

  • Structural properties, e.g. testing or measuring thicknesses, line widths, warpage, bond strengths or physical defects · CPC title

  • characterised by multiple measurements, corrections, marking or sorting processes · CPC title

  • using masks for insulating materials · CPC title

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What does patent US9390909B2 cover?
Methods for depositing nanolaminate protective layers over a core layer to enable deposition of high quality conformal films over the core layer for use in advanced multiple patterning schemes are provided. In certain embodiments, the methods involve depositing a thin silicon oxide or titanium oxide film using plasma-based atomic layer deposition techniques with a low high frequency radio frequ…
Who is the assignee on this patent?
Novellus Systems Inc
What technology area does this patent fall under?
Primary CPC classification H10P76/204. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 12 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 6 related publications on this page (citations in our corpus or others sharing the same primary CPC).