Method of manufacturing a semiconductor device

US9385040B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9385040-B2
Application numberUS-201414183870-A
CountryUS
Kind codeB2
Filing dateFeb 19, 2014
Priority dateFeb 19, 2014
Publication dateJul 5, 2016
Grant dateJul 5, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of manufacturing a semiconductor device includes providing a wafer, grinding a backside of the wafer, disposing a backside film on the backside of the wafer, cutting the wafer to singulate a plurality of dies from the wafer, and forming a mark on the backside film disposed on each of the plurality of dies by a laser operation.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of manufacturing a semiconductor device, comprising: providing a wafer; grinding a backside of the wafer; disposing a backside film on the backside of the wafer; cutting the wafer to singulate a plurality of dies from the wafer; placing the plurality of dies into cavities of a carrier respectively; picking out one of the plurality of dies from one of the cavities of the carrier, and placing the one of the plurality of dies at a marking platform; and forming a mark on the backside film disposed on the one of the plurality of dies by a laser operation. 2. The method of claim 1 , wherein the forming the mark includes projecting a laser beam directly on the backside film. 3. The method of claim 1 , wherein the forming the mark includes loading the plurality of dies one by one to a predetermined position. 4. The method of claim 1 , wherein the forming the mark includes engraving the mark with a depth of about 0.001 um to about 50 um from the backside film. 5. The method of claim 1 , further comprising temporarily bonding the wafer on a first carrier by a dicing tape prior to the cutting the wafer. 6. The method of claim 1 , wherein the disposing the backside film includes disposing the backside film permanently on the backside of the wafer. 7. The method of claim 1 , wherein the backside film is a non-cured backside film. 8. The method of claim 1 , wherein the mark formed on the backside film is absent from a residue disposed on or adjacent to the mark. 9. The method of claim 1 , wherein the mark has a depth of less than about 10 um from the backside film. 10. The method of claim 1 , wherein the backside film has a surface roughness of less than about 5 um. 11. The method of claim 1 , wherein the backside film includes epoxy, polymer or polyimide. 12. A method of manufacturing a semiconductor device, comprising: providing a wafer including a backside and a backside film disposed on the backside; mounting the wafer on a first carrier by a dicing tape; singulating a plurality of dies from the wafer disposed on the first carrier; loading the plurality of dies one by one from the first carrier to cavities of a second carrier respectively; transporting the second carrier carrying the plurality of dies; loading the plurality of dies one by one from the cavities of the second carrier to a marking platform; and laser engraving a mark on the backside film disposed on the backside of each of the plurality of dies on the marking platform. 13. The method of claim 12 , wherein the laser engraving the mark includes exposing the backside film to a laser beam with a wavelength of about 200 nm to about 600 nm. 14. The method of claim 12 , wherein the loading the plurality of dies from the first carrier to the second carrier further includes winding the second carrier carrying the plurality of dies on a reel. 15. The method of claim 12 , wherein the first carrier is a dicing ring or the second carrier is a carrier tape. 16. The method of claim 12 , further comprising inspecting the plurality of dies by an infra red (IR) after the laser engraving the mark on the backside film. 17. A method of manufacturing a semiconductor device, comprising: providing a wafer including a backside; disposing a backside film on the backside of the wafer; curing the backside film; sawing a plurality of dies from the wafer; placing a first die of the plurality of dies into a first cavity of a carrier; placing a second die of the plurality of dies into a second cavity of the carrier; picking out the first die from the first cavity of the carrier and placing the first die on a laser marking platform; laser marking on the backside film disposed on the first die; unloading the first die from the laser marking platform; picking out the second die from the second cavity of the carrier and placing the second die on the laser marking platform; laser marking on the backside film disposed on the second die; and unloading the second die from the laser marking platform. 18. The method of claim 17 , wherein the laser marking includes displacing a laser beam or the laser marking platform to form a mark on the backside film. 19. The method of claim 17 , wherein the laser marking includes heating a portion of the backside film corresponding to a mark to be formed on the backside film. 20. The method of claim 17 , wherein the wafer has a thickness of less than 250 um.

Assignees

Inventors

Classifications

  • for alignment · CPC title

  • Located on parts of packages, e.g. on encapsulations or on package substrates · CPC title

  • for identification or tracking · CPC title

  • of bump connectors · CPC title

  • between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

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Frequently asked questions

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What does patent US9385040B2 cover?
A method of manufacturing a semiconductor device includes providing a wafer, grinding a backside of the wafer, disposing a backside film on the backside of the wafer, cutting the wafer to singulate a plurality of dies from the wafer, and forming a mark on the backside film disposed on each of the plurality of dies by a laser operation.
Who is the assignee on this patent?
Taiwan Semiconductor Mfg
What technology area does this patent fall under?
Primary CPC classification H10P54/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Jul 05 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).