Ferroelectric memory and manufacturing method of the same

Patent metadata

Field	Value
Publication number	US-9362487-B2
Application number	US-201314020262-A
Country	US
Kind code	B2
Filing date	Sep 6, 2013
Priority date	Sep 10, 2012
Publication date	Jun 7, 2016
Grant date	Jun 7, 2016

Abstract

According to one embodiment, a ferroelectric memory includes a semiconductor layer, an interfacial insulating film formed on the semiconductor layer, a ferroelectric film formed on the interfacial insulating film, and a gate electrode formed on the ferroelectric film, wherein the ferroelectric film is a film which includes a metal that is hafnium (Hf) or zirconium (Zr) and oxygen as the main components and to which an element selected from the group consisting of silicon (Si), magnesium (Mg), aluminum (Al).

First claim

What is claimed is:

1. A ferroelectric memory comprising:
an insulating film formed on a semiconductor layer, the insulating film including:
a first insulating sub-film in a memory cell region; and
a second insulating sub-film in one of (1) a select gate region and (2) a peripheral circuit region, the second insulating sub-film having a composition different from a composition of the first insulating sub-film;

first and second gate electrodes formed apart from each other and on the first insulating sub-film; and
a third gate electrode formed apart from the first electrode and on the second insulating sub-film,
wherein:
the insulating film includes:
silicon (Si),
a metal comprising at least one of hafnium (Hf) and zirconium (Zr), and
oxygen,

the insulating film is continuously formed under the first to third gate electrodes in a channel length direction,
the first insulating sub-film has a configuration such that the number of silicon (Si) atoms/(the number of Hf or Zr atoms+the number of Si atoms) is 0.02 or more and 0.05 or less,
the second insulating sub-film has a configuration that satisfies one of the following conditions:
the number of Si atoms/(the number of Hf or Zr atoms+the number of Si atoms) is less than 0.02 or more than 0.05,
the number of Si atoms/(the number of Hf or Zr atoms+the number of Si atoms) is 0.06 or more and 0.3 or less, the number of Si atoms/(the number of Hf or Zr atoms+the number of Si atoms) is 0.02 or more and 0.05 or less, and 0.1 atomic percent or more of at least one of nitrogen and carbon is added, and
the number of Si atoms/(the number of Hf or Zr atoms+the number of Si atoms) is 0.02 or more and 0.05 or less, and the second insulating sub-film has an oxygen content lower than that of the first insulating sub-film and satisfies the relation O/(Hf or Zr+Si)<2, and

the first insulating sub-film has a ferroelectric crystal structure and the second insulating sub-film has a nonferroelectric crystal structure.

2. The ferroelectric memory according to claim 1 , wherein
the first insulating sub-film is orthorhombic and ferroelectric.

3. The ferroelectric memory according to claim 1 , wherein
a boundary between the first insulating sub-film and the second insulating sub-film is located between a side surface of the first gate electrode and a side surface the third gate electrode.

Assignees

• Toshiba Kk

Inventors

• Inumiya Seiji
• Ozawa Yoshio
• Yamakawa Koji
• Sakata Atsuko
• Tanaka Masayuki
• Wada Junichi

Classifications

• H10D30/0415

  of FETs having ferroelectric gate insulators · CPC title

• H10D64/689 Primary

  having ferroelectric layers · CPC title

• H01L29/516

  Electricity · mapped topic

• H01L43/12

  Electricity · mapped topic

• H01L27/1159

  Electricity · mapped topic