Voltage-controlled magnetic anisotropy (VCMA) switch and magneto-electric memory (MERAM)

Patent metadata

Field	Value
Publication number	US-9324403-B2
Application number	US-201514813421-A
Country	US
Kind code	B2
Filing date	Jul 30, 2015
Priority date	May 19, 2011
Publication date	Apr 26, 2016
Grant date	Apr 26, 2016

Abstract

Voltage controlled magnetic tunnel junctions and memory devices are described which provide efficient high speed switching of non-volatile magnetic devices at high cell densities. Implementations are described which provide a wide range of voltage control alternatives with in-plane and perpendicular magnetization, bidirectionally switched magnetization, and control of domain wall dynamics.

First claim

What is claimed is:

1. A voltage-controlled magneto-electric random access memory (MeRAM) apparatus, comprising:
at least three ferromagnetic (FM) layers having a FM fixed layer, a FM semi-fixed layer, and a FM free layer;
wherein said FM semi-fixed layer and said FM free layer are disposed on opposite sides of said FM fixed layer; and
a dielectric (DE) layer interposed between said FM free layer and FM fixed layer;
a spacer layer separating said FM semi-fixed layer from said FM fixed layer;
wherein material, shape and thickness of said FM free layer, said FM fixed layer, and said FM semi-fixed layer are selected to have in-plane (IP) and out-of-plane (OOP) anisotropies;
wherein material, shape and thickness of said FM free layer is selected to have in-plane (IP) and out-of-plane (OOP) anisotropies which are nearly equal;
wherein material, shape and thickness of said FM semi-fixed layer is selected to have in-plane (IP) and out-of-plane (OOP) anisotropies which are balanced between being nearly equal, and a preference plane of the FM fixed layer;
wherein OOP anisotropy of said FM free layer is affected by the interface properties between the FM layers and said DE layer, and is controlled by voltages applied across said DE layer as an applied voltage, giving rise to a voltage-controlled magnetic anisotropy (VCMA) effect which rotates magnetization orientation of said FM free layer and is fully switched in response to a stray magnetic field from said FM semi-fixed and fixed layers, with state of the magnetic orientation determining bit state for said MeRAM; and
wherein OOP anisotropy of said FM semi-fixed layer is affected by the interface properties between the FM layers and said DE layer, and is controlled by voltages applied across said DE layer as an applied voltage, giving rise to a voltage-controlled magnetic anisotropy (VCMA) effect which rotates magnetization orientation of said FM semi-fixed layer without fully switching its magnetic orientation.

2. The apparatus recited in claim 1 , further comprising a second DE layer disposed proximal said FM semi-fixed layer, and where interface properties between the FM semi-fixed layer and said second DE layer affect said OOP anisotropy of said FM semi-fixed layer and is controlled by voltages applied across said second DE layer, as an applied voltage, giving rise to a voltage-controlled magnetic anisotropy (VCMA) effect which rotates magnetization orientation of said FM semi-fixed layer without fully switching its magnetic orientation.

3. The apparatus recited in claim 1 , wherein bit state is written to a first state in response to application of a first voltage signal, and written to a second state in response to application of a second voltage signal.

4. The apparatus recited in claim 2 , wherein said MeRAM is read in response to electrical resistance detected across said apparatus in response to application of a voltage having a reverse polarity of said first and second voltage.

Assignees

• Univ California

Inventors

• Khalili Amiri Pedram
• Wang Kang L
• Galatsis Kosmas

Classifications

• H01F10/3254

  the spacer being semiconducting or insulating, e.g. for spin tunnel junction [STJ] · CPC title

• H10N50/80

  Constructional details · CPC title

• G11C11/1675

  Writing or programming circuits or methods · CPC title

• G11C11/161 Primary

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• H01L43/02

  Electricity · mapped topic