Method for fabricating three-dimensional semiconductor device using buried stop layer in substrate
US-2024268119-A1 · Aug 8, 2024 · US
US9305827B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9305827-B2 |
| Application number | US-201414578916-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 22, 2014 |
| Priority date | Mar 27, 2013 |
| Publication date | Apr 5, 2016 |
| Grant date | Apr 5, 2016 |
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A composite substrate for a semiconductor includes a handle substrate 11 and a donor substrate bonded to a surface of the handle substrate 11 directly or through a bonding layer. The handle substrate 11 is composed of an insulating polycrystalline material, a surface 15 of the handle substrate 11 has a microscopic central line average surface roughness Ra of 5 nm or smaller, and recesses 6 are formed on the surface of the handle substrate.
Opening claim text (preview).
The invention claimed is: 1. A handle substrate of a composite substrate for a semiconductor; said handle substrate comprising an insulating polycrystalline material, wherein said handle substrate has a surface having a microscopic central line average surface roughness Ra of 5 nm or smaller; and wherein recesses are formed on said surface and each recess has an outer profile of a circle or an ellipse in a plan view of said surface of said handle substrate. 2. The handle substrate of claim 1 , wherein a density of said recess having a diameter of 0.5 μm or larger is 50 counts or larger and 4500 counts or smaller per 1 cm 2 of said surface. 3. The handle substrate of claim 1 , wherein an average of a depth of said recess is 0.1 μm or larger and 0.8 μm or smaller. 4. The handle substrate of claim 1 , wherein an average of a diameter of said recess is 1 μm or larger and 5 μm or smaller. 5. The handle substrate of claim 1 , wherein said insulating polycrystalline material comprises alumina, silicon carbide, aluminum nitride or silicon nitride. 6. The handle substrate of claim 5 , wherein said insulating polycrystalline material comprises a translucent alumina ceramics. 7. A composite substrate for a semiconductor, said composite substrate comprising said handle substrate of claim 1 and a donor substrate bonded to said surface of said handle substrate directly or through a bonding layer. 8. The composite substrate for a semiconductor of claim 7 , wherein said bonding layer comprises Al 2 O 3 .
with separation or delamination along an ion implanted layer, e.g. Smart-cut · CPC title
Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement · CPC title
Surface structures · CPC title
by direct semiconductor to semiconductor bonding · CPC title
Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title
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