Semiconductor die and method of forming noise absorbing regions between THVs in peripheral region of the die

Patent metadata

Field	Value
Publication number	US-9236352-B2
Application number	US-201113334556-A
Country	US
Kind code	B2
Filing date	Dec 22, 2011
Priority date	Mar 13, 2009
Publication date	Jan 12, 2016
Grant date	Jan 12, 2016

Abstract

A semiconductor wafer has a plurality of semiconductor die. A peripheral region is formed around the die. An insulating material is formed in the peripheral region. A portion of the insulating material is removed to form a through hole via (THV). A conductive material is deposited in the THV to form a conductive THV. A conductive layer is formed between the conductive THV and contact pads of the semiconductor die. A noise absorbing material is deposited in the peripheral region between the conductive THV to isolate the semiconductor die from intra-device interference. The noise absorbing material extends through the peripheral region from a first side of the semiconductor die to a second side of the semiconductor die. The noise absorbing material has an angular, semi-circular, or rectangular shape. The noise absorbing material can be dispersed in the peripheral region between the conductive THV.

First claim

What is claimed:

1. A semiconductor device, comprising:
a first semiconductor die including a first surface and a second surface opposite the first surface;
a second semiconductor die laterally separated from the first semiconductor die;
an insulating material disposed between the first and second semiconductor die and extending between a level of the first surface and a level of the second surface;
a conductive via formed through the insulating material disposed between the first and second semiconductor die;
a conductive layer extending from the conductive via to the first semiconductor die; and
a plurality of electromagnetic interference (EMI) shielding particles dispersed within the insulating material around the conductive via between the level of the first surface and the level of the second surface, each EMI shielding particle being separated from the conductive via by the insulating material.

2. The semiconductor device of claim 1 , further including a plurality of conductive vias with the EMI shielding particles dispersed between the plurality of conductive vias.

3. The semiconductor device of claim 1 , further including a barrier layer formed between the EMI shielding particles and conductive via.

4. A semiconductor device, comprising:
a semiconductor die including a first surface and a second surface opposite the first surface;
an insulating material disposed completely around the semiconductor die and extending between a level of the first surface and a level of the second surface;
a conductive via formed through the insulating material and extending between the level of the first surface and the level of the second surface; and
a shielding region disposed around the conductive via and extending through the insulating material between the level of the first surface and the level of the second surface, wherein the shielding region is physically separated from the conductive via by the insulating material.

5. The semiconductor device of claim 4 , wherein the shielding region has an angular, semi-circular, or rectangular shape.

6. The semiconductor device of claim 4 , wherein the shielding region includes a plurality of electromagnetic interference (EMI) shielding particles dispersed within the insulating material around the conductive via.

7. The semiconductor device of claim 4 , further including the shielding region formed completely around the conductive via.

8. The semiconductor device of claim 4 , further including a barrier layer disposed between the shielding region and conductive via.

9. The semiconductor device of claim 4 , further including a plurality of conductive vias, wherein the shielding region is formed around the plurality of conductive vias.

10. A semiconductor device, comprising:
a semiconductor die;
an insulating material disposed in a peripheral region around the semiconductor die;
a conductive via formed through the insulating material in the peripheral region around the semiconductor die; and
a shielding region extending through the insulating material, wherein the shielding region is separated from the conductive via by the insulating material.

11. The semiconductor device of claim 10 , wherein the shielding region has an angular, semi-circular, or rectangular shape.

12. The semiconductor device of claim 10 , further including a plurality of conductive vias with the shielding region formed between the plurality of conductive vias.

13. The semiconductor device of claim 10 , further including the shielding region formed completely around the conductive via.

14. The semiconductor device of claim 10 , wherein the shield region includes a plurality of electromagnetic interference (EMI) shielding particles dispersed within the insulating material around the conductive via.

15. The semiconductor device of claim 10 , further including a barrier layer formed between the shielding region and conductive via.

16. A semiconductor device, comprising:
a semiconductor die;
an insulating material disposed in a peripheral region around the semiconductor die;
a conductive via formed through the insulating material and laterally separated from the semiconductor die;
a conductive layer extends from the conductive via to a contact pad on a surface of the semiconductor die; and
a shielding material extending through the insulating material and disposed outside a footprint of the semiconductor die to shield the conductive via.

17. The semiconductor device of claim 16 , wherein the shielding material extends from a first side of the semiconductor die to a second side of the semiconductor die opposite the first side.

18. The semiconductor device of claim 16 , wherein the shielding material has an angular, semi-circular, or rectangular shape.

19. The semiconductor device of claim 16 , wherein the shield material includes a plurality of electromagnetic interference (EMI) shielding particles dispersed within the insulating material around the conductive via.

20. The semiconductor device of claim 16 , further including the shielding material formed completely around the conductive via.

21. The semiconductor device of claim 16 , further including a barrier layer formed between the shielding material and conductive via.

22. A semiconductor device, comprising:
a semiconductor die including an active surface, a back surface, and a side surface;
an insulating material formed around the side surface of the semiconductor die;
a conductive via formed through the insulating material; and
a shielding material disposed around the conductive via and extending through the insulating material to shield the conductive via, wherein the shielding region is separated from the conductive via by the insulating material.

23. The semiconductor device of claim 22 , wherein the shielding material extends from the active surface of the semiconductor die to the back surface of the semiconductor die opposite the active surface.

24. The semiconductor device of claim 22 , wherein the shielding material has an angular, semi-circular, or rectangular shape.

25. The semiconductor device of claim 22 , wherein the shield material includes a plurality of electromagnetic interference (EMI) shielding particles dispersed within the insulating material around the conductive via.

26. The semiconductor device of claim 22 , further including the shielding material formed completely around the conductive via.

27. The semiconductor device of claim 22 , further including a barrier layer formed between the shielding material and conductive via.

28. The semiconductor device of claim 22 , wherein the shielding material is disposed between the semiconductor die and the conductive via.

29. The semiconductor device of claim 1 , wherein the EMI shielding particles are disposed between the first semiconductor die and the conductive via.

30. The semiconductor device of claim 4 , wherein the shielding region is disposed between the semiconductor die and the conductive via.

31. The semiconductor device of claim 10 , wherein the shielding region is formed between the semiconductor die and the conductive via.

32. The semiconductor device of claim 16 , wherein the shielding material is disposed between the semiconductor die and the conductive via.

Assignees

• Pagaila Reza A
• Do Byung Tai
• Huang Shuangwu
• Suthiwongsunthorn Nathapong
• Merilo Dioscoro
• Stats Chippac Ltd

Inventors

• Pagaila Reza A
• Do Byung Tai
• Huang Shuangwu
• Suthiwongsunthorn Nathapong
• Merilo Dioscoro

Classifications

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W90/297

  characterised by the through-semiconductor vias [TSVs] in the stacked chips · CPC title

• H10W90/722

  between stacked chips · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/50

  Bond wires · CPC title