Vibration Measurement Device
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Loading port, system for etching and cleaning wafers and method of use
US9136149B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9136149-B2 |
| Application number | US-201213679198-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 16, 2012 |
| Priority date | Nov 16, 2012 |
| Publication date | Sep 15, 2015 |
| Grant date | Sep 15, 2015 |
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- Title
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Abstract
Official abstract text for this publication.
A loading port includes a housing and a plurality of stations defined in the housing configured to receive a front opening universal pod (FOUP). The loading port further includes a connector configured to receive an inert gas. At least one of the plurality of stations is configured to deliver the inert gas to the FOUP to purge an interior of the FOUP of moisture. A system including the loading port and a method of using the system are also described.
First claim
Opening claim text (preview).
What is claimed is: 1. A loading port comprising: a housing; a plurality of stations defined in the housing configured to receive a front opening universal pod (FOUP), the FOUP comprising a door configured to be in one of an open position or a closed position; a connector configured to receive an inert gas; a nozzle in at least one of the plurality of stations, the nozzle being configured to convey the inert gas from the connector to the FOUP to purge an interior of the FOUP…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9136149B2 cover?
- A loading port includes a housing and a plurality of stations defined in the housing configured to receive a front opening universal pod (FOUP). The loading port further includes a connector configured to receive an inert gas. At least one of the plurality of stations is configured to deliver the inert gas to the FOUP to purge an interior of the FOUP of moisture. A system including the loading …
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H10P72/0604. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Sep 15 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).