Package-on-package (PoP) structure having at least one package comprising one die being disposed in a core material between first and second surfaces of the core material

US9123763B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9123763-B2
Application numberUS-201113271952-A
CountryUS
Kind codeB2
Filing dateOct 12, 2011
Priority dateOct 12, 2011
Publication dateSep 1, 2015
Grant dateSep 1, 2015

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Abstract

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A package-on-package (PoP) structure comprises a first package and a second package. The first package comprises a first die, a second die, and a core material. The core material has a first surface and a second surface. A first redistribution layer (RDL) is on the first surface, and a second RDL is on the second surface. The first die is disposed in the core material between the first surface and the second surface. The second die is coupled to one of the first RDL and the second RDL. The second package comprises a third die and an interposer. The interposer has a first side and a second side. The third die is coupled to the second side of the interposer. The first package is coupled to the second package by first electrical connectors coupled to the second side of the interposer and the first RDL.

First claim

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What is claimed is: 1. A package-on-package (PoP) structure comprising: an interposer having a semiconductor substrate with a first side and a second side opposite the first side, through substrate vias through the semiconductor substrate electrically coupling a first metallization pattern on the first side of the semiconductor substrate to a second metallization pattern on a second side of the semiconductor substrate; a first die on the second side of the interposer and coupled…

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What does patent US9123763B2 cover?
A package-on-package (PoP) structure comprises a first package and a second package. The first package comprises a first die, a second die, and a core material. The core material has a first surface and a second surface. A first redistribution layer (RDL) is on the first surface, and a second RDL is on the second surface. The first die is disposed in the core material between the first surface …
Who is the assignee on this patent?
Yu Chen-Hua, Liu Chung-Shi, Lii Mirng-Ji, and 3 more
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Sep 01 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).