Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
Process for forming package-on-package structures
US8975741B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8975741-B2 |
| Application number | US-201113275065-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 17, 2011 |
| Priority date | Oct 17, 2011 |
| Publication date | Mar 10, 2015 |
| Grant date | Mar 10, 2015 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and the plurality of redistribution lines. A polymer-comprising material is under the inter-layer dielectric. The device die, the die-attach film, and the plurality of Z-interconnects are disposed in the polymer-comprising material.
First claim
Opening claim text (preview).
What is claimed is: 1. A device comprising: an inter-layer dielectric; a first device die under the inter-layer dielectric; a die-attach film under the inter-layer dielectric and over the first device die, wherein the die-attach film is attached to the device die; a first plurality of redistribution lines comprising first portions level with the die-attach film; a first plurality of Z-interconnects electronically coupled to the device die and the first plurality of redistr…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8975741B2 cover?
- A device includes an inter-layer dielectric, a device die under the inter-layer dielectric; and a die-attach film under the inter-layer dielectric and over the device die, wherein the die-attach film is attached to the device die. A plurality of redistribution lines includes portions level with the die-attach film. A plurality of Z-interconnects is electronically coupled to the device die and t…
- Who is the assignee on this patent?
- Lin Chih-Wei, Cheng Ming-Da, Chen Meng-Tse, and 4 more
- What technology area does this patent fall under?
- Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Mar 10 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).