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Semiconductor component having a second passivation layer having a first opening exposing a bond pad and a plurality of second openings exposing a top surface of an underlying first passivation layer
US9105588B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9105588-B2 |
| Application number | US-90945810-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 21, 2010 |
| Priority date | Oct 21, 2010 |
| Publication date | Aug 11, 2015 |
| Grant date | Aug 11, 2015 |
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- Title
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- Abstract
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Abstract
Official abstract text for this publication.
A conductive feature on a semiconductor component is disclosed. A first passivation layer is formed over a substrate. A bond pad is formed over the first passivation layer. A second passivation layer overlies the first passivation layer and the bond pad. The second passivation layer has a first opening overlying the bond pad and a plurality of second openings exposing a top surface of the first passivation layer. A buffer layer overlies the second passivation layer and fills the plurality of second openings. The buffer layer has a third opening overlapping the first opening and together exposes a portion the bond pad. The combined first opening and third opening has sidewalls. An under bump metallurgy (UBM) layer overlies the sidewalls of the combined first opening and third opening, and contacts the exposed portion of the bond pad. A conductive feature overlies the UBM layer.
First claim
Opening claim text (preview).
The invention claimed is: 1. A semiconductor component, comprising: a first passivation layer over a substrate; a bond pad overlying the first passivation layer; a second passivation layer overlying the first passivation layer and the bond pad, the second passivation layer having a first opening and a plurality of second openings, wherein the first opening overlies the bond pad, the plurality of the second openings exposes a top surface of the first passivation layer, and each…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9105588B2 cover?
- A conductive feature on a semiconductor component is disclosed. A first passivation layer is formed over a substrate. A bond pad is formed over the first passivation layer. A second passivation layer overlies the first passivation layer and the bond pad. The second passivation layer has a first opening overlying the bond pad and a plurality of second openings exposing a top surface of the first…
- Who is the assignee on this patent?
- Chen Ying-Ju, Chen Hsien-Wei, Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H10W74/137. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Aug 11 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).