Substrate correction device, substrate lamination device, substrate processing system, substrate correction method, substrate processing method, and semiconductor device manufacturing method
US-2024404859-A1 · Dec 5, 2024 · US
In-situ formation of silicon and tantalum containing barrier
US8946083B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8946083-B2 |
| Application number | US-201113167857-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 24, 2011 |
| Priority date | Jun 24, 2011 |
| Publication date | Feb 3, 2015 |
| Grant date | Feb 3, 2015 |
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Abstract
Official abstract text for this publication.
A method includes forming an opening in a dielectric layer, and forming a silicon rich layer on a surface of the dielectric layer. A portion of the silicon rich layer extends into the opening and contacts the dielectric layer. A tantalum-containing layer is formed over and the contacting the silicon rich layer. An annealing is performed to react the tantalum-containing layer with the silicon rich layer, so that a tantalum-and-silicon containing layer is formed.
First claim
Opening claim text (preview).
What is claimed is: 1. A method comprising: forming an opening in a dielectric layer; forming a silicon rich layer in the opening and contacting the dielectric layer; forming a tantalum-containing layer over and contacting the silicon rich layer; performing an annealing to react the tantalum-containing layer with the silicon rich layer to form a tantalum-and-silicon containing layer; after the annealing, filling the opening with a copper-containing metallic material, where…
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- H10P95/00Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US8946083B2 cover?
- A method includes forming an opening in a dielectric layer, and forming a silicon rich layer on a surface of the dielectric layer. A portion of the silicon rich layer extends into the opening and contacts the dielectric layer. A tantalum-containing layer is formed over and the contacting the silicon rich layer. An annealing is performed to react the tantalum-containing layer with the silicon ri…
- Who is the assignee on this patent?
- Jangjian Shiu-Ko, Wang Ting-Chun, Wu Szu-An, and 1 more
- What technology area does this patent fall under?
- Primary CPC classification H10P95/00. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Feb 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).