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Systems and methods of automatically detecting failure patterns for semiconductor wafer fabrication processes
US8938698B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8938698-B2 |
| Application number | US-201314108392-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 17, 2013 |
| Priority date | Apr 25, 2012 |
| Publication date | Jan 20, 2015 |
| Grant date | Jan 20, 2015 |
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Abstract
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A system and method of automatically detecting failure patterns for a semiconductor wafer process is provided. The method includes receiving a test data set collected from testing a plurality of semiconductor wafers, forming a respective wafer map for each of the wafers, determining whether each respective wafer map comprises one or more respective objects, selecting the wafer maps that are determined to comprise one or more respective objects, selecting one or more object indices for selecting a respective object in each respective selected wafer map, determining a plurality of object index values in each respective selected wafer map, selecting an object in each respective selected wafer map, determining a respective feature in each of the respective selected wafer, classifying a respective pattern for each of the respective selected wafer maps and using the respective wafer fingerprints to adjust one or more parameters of the semiconductor fabrication process.
First claim
Opening claim text (preview).
What we claim is: 1. A method of fabricating semiconductor wafers using automatically detected failure patterns, comprising: forming respective wafer fingerprints by selecting a respective object of one or more objects in a respective wafer map of a plurality of wafer maps; determining a respective feature in each of the respective wafer maps using the respective selected object, classifying a respective pattern for each of the respective wafer maps using the respective determ…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- H10P74/23Primary
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US8938698B2 cover?
- A system and method of automatically detecting failure patterns for a semiconductor wafer process is provided. The method includes receiving a test data set collected from testing a plurality of semiconductor wafers, forming a respective wafer map for each of the wafers, determining whether each respective wafer map comprises one or more respective objects, selecting the wafer maps that are det…
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg
- What technology area does this patent fall under?
- Primary CPC classification H10P74/23. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Jan 20 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).