Circuit arrangement
US-2017356954-A1 · Dec 14, 2017 · US
US8928508B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-8928508-B2 |
| Application number | US-201213526147-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 18, 2012 |
| Priority date | Aug 11, 2009 |
| Publication date | Jan 6, 2015 |
| Grant date | Jan 6, 2015 |
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An analog-to-digital converter (ADC) including a plurality of comparators connected to the ADC. The ADC further includes a first pair of terminals and a second pair of terminals connected to each of the plurality of comparators. The ADC further includes a first pair of switches coupled to each of the first pair of terminals and a second pair of switches coupled to each of the second pair of terminals, where the first and second pair of switches are configured to alternate a corresponding comparator between normal operation and a calibration configuration. Comparators other than the corresponding comparator are configured for normal operation if the corresponding comparator is configured to be calibrated.
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What is claimed is: 1. An analog-to-digital converter (ADC) comprising: a plurality of comparators connected to the ADC; a first pair of terminals and a second pair of terminals connected to each of the plurality of comparators; a first pair of switches coupled to each of the first pair of terminals; a second pair of switches coupled to each of the second pair of terminals, wherein the first and second pair of switches are configured to alternate a corresponding comparator between normal operation and a calibration configuration, and comparators other than the corresponding comparator are configured for normal operation if the corresponding comparator is configured to be calibrated. 2. The ADC of claim 1 , further comprising a first switch at a first of the first pair of terminals for each of the plurality of comparators and a second switch at a second of the first pair of terminals for each of the plurality of comparators. 3. The ADC of claim 2 , wherein the first switch is between a first reference voltage and the first of the first pair of terminals and the second switch is between a second reference voltage and the second of the first pair of terminals, wherein a polarity of the first reference voltage is an inverse of a polarity of the second reference voltage. 4. The ADC of claim 2 , further comprising a third switch at a first of the second pair of terminals for each of the plurality of comparators and a fourth switch at a second of the second pair of terminals for each of the plurality of comparators. 5. The ADC of claim 4 , wherein third switch is between an input signal or a calibration signal and the first of the second pair of terminals, and the fourth switch is between the input signal or the calibration signal and the second of the second pair of terminals. 6. The ADC of claim 1 , wherein each of the first pair of terminals is configured to receive a reference voltage or ground and the second pair of terminals is configured to receive a calibration signal or an input signal. 7. The ADC of claim 1 , wherein the ADC is an N-bit ADC and the plurality of comparators comprises 2 N comparators. 8. The ADC of claim 7 , wherein 2 N- 1 comparators are configured to be in normal operation and one comparator is configured to be calibrated. 9. The ADC of claim 1 , further comprising a resistive divider comprising a plurality of resistive devices configured to provide reference voltages to each comparator of the plurality of comparators. 10. The ADC of claim 9 , wherein a number of the plurality of resistive devices is equal to a number of the plurality of comparators. 11. An analog-to-digital converter (ADC) comprising: a first comparator connected to the ADC; a first terminal and a second terminal connected to the first comparator; a first switch coupled to the first terminal; a second comparator connected to the ADC; and a third terminal and a fourth terminal connected to the second comparator, wherein the first switch is configured to disconnect the first comparator from a reference voltage. 12. The ADC of claim 11 , wherein the first switch is coupled to the third terminal. 13. The ADC of claim 12 , further comprising a second switch coupled to the third terminal. 14. An analog-to-digital converter (ADC) comprising: a plurality of comparators connected to the ADC; a first terminal and a second terminal connected to each of the plurality of comparators; a first switch coupled to the first terminal of each of the plurality of comparators; a second switch coupled to the second terminal of each of the plurality of comparators, wherein the first and second switches are configured to alternate a corresponding comparator between normal operation and a calibration configuration, and comparators other than the corresponding comparator are configured for normal operation if the corresponding comparator is configured to be calibrated. 15. The ADC of claim 14 , wherein the ADC is an N-bit ADC and the plurality of comparators comprises 2 N comparators. 16. The ADC of claim 15 , wherein 2 N- 1 comparators are configured to be in normal operation and one comparator is configured to be calibrated. 17. The ADC of claim 14 , further comprising a resistive divider comprising a plurality of resistive devices configured to provide reference voltages to each comparator of the plurality of comparators. 18. The ADC of claim 17 , wherein a number of the plurality of resistive devices is equal to a number of the plurality of comparators. 19. The ADC of claim 14 , further comprising an encoder configured to transform thermometer code received from the plurality of comparators into binary code. 20. The ADC of claim 14 , wherein each of the plurality of comparators is configured to receive a clock signal.
without interrupting normal operation, e.g. by providing an additional component for temporarily replacing components to be tested or calibrated (H03M1/1009, H03M1/1071 take precedence) · CPC title
the voltage divider being a single resistor string · CPC title
Calibration · CPC title
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