Resistive memory cell using an interfacial transition metal compound layer and method of forming the same
US-2024389482-A1 · Nov 21, 2024 · US
US2025386747A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2025386747-A1 |
| Application number | US-202519052514-A |
| Country | US |
| Kind code | A1 |
| Filing date | Feb 13, 2025 |
| Priority date | Jun 13, 2024 |
| Publication date | Dec 18, 2025 |
| Grant date | — |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
Disclosed are tin-based perovskite field effect transistor memory and a method for manufacturing the same. In detail, a perovskite comprises at least one selected from the group consisting of cesium (Cs), methylammonium (MA), and formamidinium (FA); a compound represented by the structural formula 1; at least one selected from the group consisting of fluorine (F), chlorine (Cl), bromine (Br), and iodine (I); and tin (Sn). The transistor memory of the present invention can be utilized as a p-type transistor or a memory device, and can be utilized as a device for in-memory processing.
Opening claim text (preview).
What is claimed is: 1 . A perovskite comprising: at least one selected from the group consisting of cesium (Cs), methylammonium (MA) and formamidinium (FA); a compound represented by structural formula 1; at least one selected from the group consisting of fluorine (F), chlorine (Cl), bromine (Br) and iodine (I); and tin (Sn). in the structural formula 1, R 1 is a hydrogen atom, a methyl group or an ethyl group, R 2 is a hydrogen atom, a methyl group or an ethyl group, and n is anyone of integers 1 to 3. 2 . The perovskite of claim 1 , wherein the compound represented by the structural formula 1 comprises at least one selected from the group consisting of ethane-1,2-diammonium (EDA), propane-1,2-diammonium (P2DA), propane-1,3-diammonium (P3DA), Piperazine-1,4-diium iodide, Piperazine-1,4-diium chloride and Piperazine-1,4-diium bromide. 3 . The perovskite of claim 1 , having a hollow structure within a lattice. 4 . The perovskite of claim 1 , further comprising a compound represented by structural formula 2. in the structural formula 2, R 3 is a hydrogen atom, a methyl group, or an ethyl group, R 4 is a hydrogen atom, a methyl group or an ethyl group, R 5 is a hydrogen atom, a methyl group, an ethyl group, a C6 to C10 aryl group or a C6 to C14 aryl group fused to the benzene ring, p is anyone of integers 0 to 3, and q is anyone of integers 1 to 3. 5 . The perovskite of claim 4 , comprising 0.1 to 100 mol of at least one selected from the group consisting of the compound represented by the structural formula 1 and the compound represented by the structural formula 2 on the basis of 100 mol of the tin. 6 . The perovskite of claim 4 , comprising a 2D/3D (quasi 2D) structure. 7 . The perovskite of claim 4 , wherein the compound represented by the structural formula 2 is located on a surface of the perovskite crystal. 8 . The perovskite of claim 1 , comprising a grain boundary formed between a grain and a neighboring grain, and wherein at least one metal fluoride compound selected from the group consisting of SnF 2 and SbF 3 is located at the grain boundary. 9 . The perovskite of claim 1 , which is used in a semiconductor layer of at least one device selected from the group consisting of a memory device, a transistor, a solar cell, a light-emitting diode, a photodiode and a photosensor. 10 . The perovskite of claim 9 , wherein a thickness of the semiconductor layer is in a range of 1 to 100 nm. 11 . A transistor memory comprising: a gate electrode; an insulating layer located on the gate electrode; a semiconductor layer comprising a perovskite located on the insulating layer; and a source electrode and a drain electrode located at a distance from each other on the semiconductor layer. 12 . The transistor memory of claim 11 , wherein the perovskite comprising: at least one selected from the group consisting of cesium (Cs), methylammonium (MA) and formamidinium (FA); a compound represented by structural formula 1; at least one selected from the group consisting of fluorine (F), chlorine (Cl), bromine (Br), and iodine (I); and tin (Sn). in the structural formula 1, R 1 is a hydrogen atom, a methyl group or an ethyl group, R 2 is a hydrogen atom, a methyl group or an ethyl group, and n is anyone of integers 1 to 3. 13 . A method of preparing a perovskite, the method comprising: (a) preparing a precursor solution comprising a tin precursor, a compound represented by structural formula 1′, a solvent and at least one selected from the group consisting of a cesium (Cs) precursor, a methylammonium (MA) precursor and a formamidinium (FA) precursor; (b) coating the precursor solution on a substrate to form a coating layer; and (c) heat-treating the coating layer to prepare a perovskite. in the structural formula 1′, R 1 is a hydrogen atom, a methyl group or an ethyl group, R 2 is a hydrogen atom, a methyl group, or an ethyl group, X is F, Cl, Br or I and n is anyone of integers 1 to 3. 14 . The method of claim 13 , wherein the perovskite comprising: at least one selected from the group consisting of cesium (Cs), methylammonium (MA) and formamidinium (FA); a compound represented by structural formula 1; at least one selected from the group consisting of fluorine (F), chlorine (Cl), bromine (Br), and iodine (I); and tin (Sn). in structural formula 1, R 1 is a hydrogen atom, a methyl group or an ethyl group, R 2 is a hydrogen atom, a methyl group or an ethyl group, and n is anyone of integers 1 to 3. 15 . The method of claim 13 , wherein the compound represented by the structural formula 1′ comprises at least one selected from the group consisting of ethane-1,2-diammonium diiodide (EDAI 2 ), ethane-1,2-diammonium dibromide (EDABr 2 ), propane-1,2-diammonium diiodide (P2DAI 2 ), propane-1,2-diammonium dibromide (P2DABr 2 ), propane-1,3-diammonium diiodide (P3DAI 2 ) and propane-1,3-diammonium (P3DABr 2 ). 16 . The method of claim 13 , wherein the precursor solution further comprises a compound represented by structural formula 2′. in the structural formula 2′, R 3 is a hydrogen atom, a methyl group or an ethyl group, R 4 is a hydrogen atom, a methyl group or an ethyl group, R 5 is a hydrogen atom, a methyl group, an ethyl group, a C6 to C10 aryl group or a C6 to C14 aryl group fused to the benzene ring, Y F, Cl, Br or I, p is anyone of integers 0 to 3, and q is anyone of integers 1 to 3. 17 . The method of claim 16 , wherein the compound represented by the structural formula 2′ comprises at least one selected from the group consisting of phenylethylammonium iodide (PEAI), n-butylammonium iodide (BAI) and 1-naphthylmethylammonium iodide (NMAI). 18 . The method of claim 13 , wherein the coating of the step (b) is carried out by at least one method selected from the group consisting of spin coating, bar coating, slot coating, inkjet coating, spray coating, dispensing, thermal evaporation, chemical vapor deposition (CVD), atomic layer deposition (ALD), sputtering, flexography, screen, dip-coating and gravure method. 19 . The method of claim 13 , wherein the heat treatment of the step (c) is carried out at a temperature in a range of room temperature to 200° C. 20 . A method of manufacturing a transistor memory, the method comprising: (1) preparing a gate electrode/insulating layer laminate comprising a gate electrode and an insulating layer located on the gate electrode; (2) forming a semiconductor layer comprising a perovskite according to claim 1 on the insulating layer; and (3) forming a source electrode and a drain electrode on the semiconductor layer.
Organic perovskites; Hybrid organic-inorganic perovskites [HOIP], e.g. CH3NH3PbI3 · CPC title
the species being metal cations, e.g. programmable metallization cells · CPC title
having three or more electrodes, e.g. transistor-like devices · CPC title
Formation of switching materials, e.g. deposition of layers · CPC title
Resistance change memory devices, e.g. resistive RAM [ReRAM] devices · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.