Electronic memory device having an electrode made of a soluble material
US-9209391-B2 · Dec 8, 2015 · US
Fabrication method of vertical type semiconductor memory apparatus
US9196832B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9196832-B2 |
| Application number | US-201514676422-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 1, 2015 |
| Priority date | Jun 21, 2013 |
| Publication date | Nov 24, 2015 |
| Grant date | Nov 24, 2015 |
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Abstract
Official abstract text for this publication.
Semiconductor memory apparatus and a method of fabricating the same are provided. The semiconductor memory apparatus includes a semiconductor substrate in which a cell area and a peripheral area are defined, a plurality of pillars formed in the a cell area of the semiconductor substrate to a first depth, a stepped part formed in the peripheral area to a height corresponding to the first depth, a recessed part formed in the stepped part to a second depth, and a core switching device formed in the recessed part.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of fabricating semiconductor memory apparatus, comprising: defining a cell area and a peripheral area in a semiconductor substrate; forming a plurality of pillars in the cell area by recessing a predetermined portion of the semiconductor substrate in the cell area to a first depth; forming a recessed part surrounded by the semiconductor substrate in the peripheral area by recessing a predetermined portion of the semiconductor substrate in the pe…
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Electricity · mapped topic
- H01L45/1683Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9196832B2 cover?
- Semiconductor memory apparatus and a method of fabricating the same are provided. The semiconductor memory apparatus includes a semiconductor substrate in which a cell area and a peripheral area are defined, a plurality of pillars formed in the a cell area of the semiconductor substrate to a first depth, a stepped part formed in the peripheral area to a height corresponding to the first depth, …
- Who is the assignee on this patent?
- Sk Hynix Inc
- What technology area does this patent fall under?
- Primary CPC classification H01L45/1683. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).