Semiconductor devices, fabrication methods of semiconductor devices and semiconductor apparatus

Patent metadata

Field	Value
Publication number	US-2024387408-A1
Application number	US-202318529960-A
Country	US
Kind code	A1
Filing date	Dec 5, 2023
Priority date	May 15, 2023
Publication date	Nov 21, 2024
Grant date	—

Abstract

Examples of the present application disclose semiconductor devices, fabrication methods of semiconductor devices, and semiconductor apparatus. In one example, the semiconductor device includes a first die, the first die includes a first bonding layer, wherein the first bonding layer includes a first connection structure and a first metal ring, the first metal ring disposed around the first connection structure.

First claim

What is claimed is:

1 . A semiconductor device, comprising:
a first die comprising a first bonding layer and a first metal ring, wherein the first bonding layer includes a first connection structure and the first metal ring is disposed around the first connection structure.

2 . The semiconductor device of claim 1 , wherein the first metal ring is closed around the first connection structure.

3 . The semiconductor device of claim 1 , wherein the first die includes a first substrate, a first circuit layer located on the first substrate, and the first bonding layer located on the first circuit layer; and
the first connection structure includes a first connection line and a first connection terminal, the first connection line is connected with the first circuit layer, the first connection terminal is disposed at an end of the first connection line far away from the first circuit layer.

4 . The semiconductor device of claim 3 , wherein in a direction perpendicular to the first bonding layer, a thickness of the first metal ring is 1 - 3 times of a thickness of the first connection terminal.

5 . The semiconductor device of claim 3 , wherein the first connection structure further includes a first heat preservation portion that is disposed on a sidewall of the first connection terminal.

6 . The semiconductor device of claim 1 , further includes a second die corresponding to the first die, the second die including a second bonding layer,
wherein the second bonding layer includes a second connection structure and a second metal ring disposed around the second connection structure.

7 . The semiconductor device of claim 6 , wherein the second metal ring is closed around the second connection structure and an orthographic projection of the first metal ring on the second die at least partially overlaps with the second metal ring.

8 . The semiconductor device of claim 6 , wherein the second die includes a second substrate, a second circuit layer located on a side of the second substrate close to the first die, and the second bonding layer is located on a side of the second circuit layer close to the first die; and
the second connection structure includes a second connection line and a second connection terminal, the second connection line is connected with the second circuit layer, the second connection terminal is disposed at an end of the second connection line far away from the second circuit layer.

9 . The semiconductor device of claim 8 , wherein a thickness of the second metal ring is 1 - 3 times of a thickness of the second connection terminal.

10 . The semiconductor device of claim 8 , wherein the second connection structure further includes a second heat preservation portion that is disposed on a sidewall of the second connection terminal.

11 . A fabrication method of a semiconductor device, comprising:
providing a first die and a second die, wherein the first die comprises a first bonding layer, a first connection structure and a first metal ring, the first metal ring closed around the first connection structure, the second die including a second bonding layer and a second connection structure; disposing the first bonding layer and the second bonding layer in face-to-face manner, the first connection structure and the second connection structure being disposed in a contraposition contact manner; and connecting the first connection structure with the second connection structure by bonding.

12 . The fabrication method of the semiconductor device of claim 11 , wherein in providing the first die and the second die, the first connection structure is exposed to a surface of the first bonding layer, the first metal ring is exposed to the surfaces of the first bonding layer, the second connection structure is exposed to a surface of the second bonding layer.

13 . The fabrication method of the semiconductor device of claim 11 , wherein connecting the first connection structure with the second connection structure by bonding comprises:
disposing an electromagnetic induction heater at peripheries of the first bonding layer and the second bonding layer; and starting the electromagnetic induction heater to connect the first connection structure with the second connection structure by bonding.

14 . The fabrication method of the semiconductor device of claim 13 , wherein the electromagnetic induction heater comprises a coil assembly, alternating current is set within coils in the coil assembly, the coil assembly generates magnetic field perpendicular to the first bonding layer.

15 . The fabrication method of the semiconductor device of claim 14 , wherein the coil assembly comprises a first winding area and second winding areas located on two sides of the first winding area, wherein the first winding area corresponds to the first bonding layer, a coil density within the first winding area is greater than a coil density within the second winding areas.

16 . The fabrication method of the semiconductor device of claim 11 , wherein providing the first die and the second die comprises:
providing a first wafer comprising a plurality of the first die, wherein a plurality of the first metal ring are disposed around the plurality of the first die; and wherein providing the first wafer comprises:
providing a first dielectric layer, the first dielectric layer connecting a plurality the first bonding layer of the plurality of the first die,
wherein the plurality of the first metal ring are disposed in the first dielectric layer and the plurality of the first bonding layer.

17 . The fabrication method of the semiconductor device of claim 11 , wherein in providing the plurality of the first die and a plurality of the second die, the plurality of the second die further comprise second metal rings that are exposed to surfaces of the plurality of the second bonding layer, each of the second metal rings is disposed as being closed around at least one of a plurality of the second connection structure.

18 . The fabrication method of the semiconductor device of claim 17 , wherein providing the first die and the second die comprises:
providing a second wafer comprising a plurality of the second die, wherein a plurality of the second metal ring are disposed around the plurality of the second die; and wherein providing the second wafer comprises:
providing a second dielectric layer, the second dielectric layer connecting a plurality of the second bonding layer of the plurality of the second die,
wherein a plurality of the second metal ring are disposed in the second dielectric layer and the plurality of the second bonding layer.

19 . The fabrication method of the semiconductor device of claim 17 , wherein in disposing the first bonding layer and the second bonding layer in face-to-face manner, with the first connection structure and the second connection structure being disposed in a contraposition contact manner, an orthographic projection of the first metal ring on the second die at least partially overlaps with the second metal ring.

20 . A semiconductor apparatus, comprising:
an electromagnetic induction heater configured to surround a semiconductor device in a bonding process; and a first die including a first bonding layer, wherein a first metal ring is disposed around a first connection structure.

Assignees

• Yangtze Memory Tech Co Ltd

Inventors

• Xie Wei
• Fan Dongyu
• Liu Lei
• Zhang Kun
• Zhou Wenxi
• Xia Zhiliang

Classifications

• H10W72/07235

  Applying EM radiation, e.g. induction heating or using a laser · CPC title

• H10W72/071 Primary

  Connecting or disconnecting · CPC title

• H10W80/00

  Direct bonding of chips, wafers or substrates · CPC title

• H10W72/0198

  batch processes · CPC title

• H10W72/952

  comprising metals or metalloids, e.g. PbSn, Ag or Cu · CPC title