Methods of forming electronic devices, and related electronic devices and electronic systems
US-11069561-B2 · Jul 20, 2021 · US
US2023402317A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2023402317-A1 |
| Application number | US-202217806131-A |
| Country | US |
| Kind code | A1 |
| Filing date | Jun 9, 2022 |
| Priority date | Jun 9, 2022 |
| Publication date | Dec 14, 2023 |
| Grant date | — |
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A structure includes a first air gap including a first opening defined in a first dielectric layer and a second dielectric layer over the first opening and closing an end portion of the first opening. A second air gap may be over at least a portion of the first air gap. The second air gap includes a second opening defined in the second dielectric layer and a third dielectric layer over the second opening and closing an end portion of the second opening. The second air gap has a pointed lower end portion. In another version, the structure includes a first air gap in a first dielectric layer, a second dielectric layer over the first air gap, and a discrete dielectric member positioned in the second dielectric layer and aligned over the first air gap.
Opening claim text (preview).
What is claimed is: 1 . A structure, comprising: a first air gap including a first opening defined in a first dielectric layer and a second dielectric layer over the first opening; a second air gap over at least a portion of the first air gap, the second air gap including a second opening defined in at least a third dielectric layer over the second dielectric layer, and a fourth dielectric layer over the second opening; and wherein the second air gap has a pointed lower end portion. 2 . The structure of claim 1 , wherein at least one of the first, second, third and fourth dielectric layers include at least one of: a silane-based silicon dioxide, a tetraethyl orthosilicate (TEOS) based silicon dioxide and a fluorinated TEOS (FTEOS) based silicon dioxide. 3 . The structure of claim 1 , wherein the first air gap has a planar lower end portion. 4 . The structure of claim 1 , wherein at least one of the first air gap and the second air gap is positioned between conductors in the first dielectric layer and the second dielectric layer, respectively. 5 . The structure of claim 1 , further comprising a third air gap defined in at least the third dielectric layer adjacent the second air gap, wherein the third air gap is devoid of an air gap thereunder in the first dielectric layer, and wherein the third air gap includes a planar lower end portion having a lowermost extent extending deeper into one of the second dielectric layer and the third dielectric layer than a lowermost extent of the second air gap. 6 . A structure, comprising: a first air gap in a first dielectric layer; and a second dielectric layer over the first air gap; and a discrete dielectric member positioned in the second dielectric layer and aligned over the first air gap, the discrete dielectric member including a different dielectric material than the second dielectric layer. 7 . The structure of claim 6 , further comprising a second air gap in at least a third dielectric layer over the second dielectric layer and over at least a portion of the first air gap, and the discrete dielectric member positioned in the second dielectric layer between the first air gap and the second air gap. 8 . The structure of claim 7 , wherein the first air gap includes a first opening defined in the first dielectric layer, the second dielectric layer closing an end portion of the first opening; and wherein the second air gap includes a second opening defined in at least the third dielectric layer, and a fourth dielectric layer over the second opening and closing an end portion of the second opening. 9 . The structure of claim 8 , wherein the first, second, third and fourth dielectric layers include least one of: a silane-based silicon dioxide, a tetraethyl orthosilicate (TEOS) based silicon dioxide and a fluorinated TEOS (FTEOS) based silicon dioxide. 10 . The structure of claim 7 , wherein at least one of the first air gap and the second air gap is positioned between conductors in the first dielectric layer and the third dielectric layer, respectively. 11 . The structure of claim 7 , further comprising a third air gap defined in at least the third dielectric layer adjacent the second air gap, wherein the third air gap is devoid of an air gap thereunder in the first dielectric layer, and wherein the third air gap includes a lowermost extent extending deeper into one of the second and third dielectric layers than a lowermost extent of the second air gap. 12 . The structure of claim 11 , wherein the third air gap includes a planar lower end portion. 13 . The structure of claim 7 , wherein the first air gap includes a first opening defined in the first dielectric layer, and wherein the discrete dielectric member is over an end portion of the first opening; and wherein the second air gap includes a second opening defined in at least a third dielectric layer over the second dielectric layer, and a fourth dielectric layer is over an end portion of the second opening. 14 . A method, comprising: forming a first opening in a first dielectric layer; forming a second dielectric layer over the first opening to one of: stop before sealing the first opening to leave an end portion of the first opening open, and close the end portion of the first opening to form a first air gap, wherein the second dielectric layer includes an indentation in an upper surface thereof over the end portion of the first opening; forming a discrete dielectric member in the indentation, wherein where the end portion remains open after forming the second dielectric layer, the discrete dielectric member closes the end portion of the first opening to form the first air gap; forming a third dielectric layer over the second dielectric layer and the discrete dielectric member; forming a second opening in at least the third dielectric layer over at least a portion of the first air gap; and forming a fourth dielectric layer over the second opening to close an end portion of the second opening and form a second air gap. 15 . The method of claim 14 , wherein forming the discrete dielectric member includes depositing another dielectric layer over the first dielectric layer and in the indentation, and planarizing the another dielectric layer, and wherein the discrete dielectric member has a pointed end portion and a planar surface opposing the pointed end portion. 16 . The method of claim 14 , wherein forming the second opening includes etching the at least third dielectric layer to expose the discrete dielectric member. 17 . The method of claim 14 , further comprising expanding at least one of: a lateral extent of the first opening after forming the first opening, and a lateral extent of the second opening after forming the second opening. 18 . The method of claim 14 , wherein forming at least one of the second dielectric layer and the fourth dielectric layer includes depositing at least one of: a silane-based silicon dioxide, a tetraethyl orthosilicate (TEOS) based silicon dioxide and a fluorinated TEOS (FTEOS) based silicon dioxide. 19 . The method of claim 14 , further comprising forming a third air gap defined in at least the third dielectric layer adjacent the second air gap, wherein the third air gap is devoid of an air gap thereunder in the first dielectric layer, and wherein the third air gap includes a lowermost extent extending deeper into the second dielectric layer than a lowermost extent of the second air gap. 20 . The method of claim 14 , further comprising forming a capping layer over the third dielectric layer prior to forming the second opening, and after forming the second opening, removing the discrete dielectric member.
of dielectric parts comprising air gaps · CPC title
comprising air gaps · CPC title
of air gaps · CPC title
comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title
Capacitive arrangements or effects of, or between wiring layers · CPC title
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