Methods of forming electronic devices, and related electronic devices and electronic systems

Patent metadata

Field	Value
Publication number	US-11069561-B2
Application number	US-201916409176-A
Country	US
Kind code	B2
Filing date	May 10, 2019
Priority date	May 10, 2019
Publication date	Jul 20, 2021
Grant date	Jul 20, 2021

Abstract

An electronic device comprises a dielectric structure, interconnect structures extending into the dielectric structure and having uppermost vertical boundaries above uppermost vertical boundaries of the dielectric structure, an additional barrier material covering surfaces of the interconnect structures above the uppermost vertical boundaries of the dielectric structure, an isolation material overlying the additional barrier material, and at least one air gap laterally intervening between at least two of the interconnect structures laterally-neighboring one another. Each of the interconnect structures comprises a conductive material, and a barrier material intervening between the conductive material and the dielectric structure. The at least one air gap vertically extends from a lower portion of the isolation material, through the additional barrier material, and into the dielectric structure. Electronic systems and method of forming an electronic device are also described.

First claim

What is claimed is:

1. An electronic device, comprising:
a dielectric structure;
interconnect structures extending into the dielectric structure and having uppermost vertical boundaries above uppermost vertical boundaries of the dielectric structure, each of the interconnect structures comprising:
a conductive material; and
a barrier material intervening between the conductive material and the dielectric structure;

an additional barrier material covering surfaces of the interconnect structures above the uppermost vertical boundaries of the dielectric structure;
an isolation material overlying the additional barrier material; and
at least one air gap laterally intervening between at least two of the interconnect structures laterally-neighboring one another, the at least one air gap vertically extending from a lower portion of the isolation material, through the additional barrier material, and into the dielectric structure.

2. The electronic device of claim 1 , wherein the uppermost vertical boundaries of the interconnect structures are offset from the uppermost vertical boundaries of the dielectric structure by a vertical distance within a range of from about 1.5 times a thickness of the additional barrier material to about 3.0 times the thickness of the additional barrier material.

3. The electronic device of claim 1 , wherein:
the conductive material of each of the interconnect structures comprises copper; and
the barrier material of each of the interconnect structures comprises one or more of a tantalum-containing material, a tungsten-containing material, a titanium-containing material, and a ruthenium-containing material.

4. The electronic device of claim 1 , wherein:
the at least two of the interconnect structures are laterally separated from one another by a first distance; and
at least two other of the interconnect structures are laterally separated from one another by a second distance greater than the first distance, the dielectric structure substantially free of air gaps laterally intervening between the at least two other of the interconnect structures.

5. The electronic device of claim 4 , wherein:
the at least two of the interconnect structures comprise:
a first interconnect structure; and
a second interconnect structure having substantially the same width as the first interconnect structure; and

the at least two other of the interconnect structures comprise:
the second interconnect structure; and
a third interconnect structure having a larger width than the first interconnect structure and the second interconnect structure.

6. The electronic device of claim 1 , wherein the additional barrier material comprises a low-k dielectric material having a lower a dielectric constant than Si 3 N 4 and a thickness within a range of from about 30 nm to about 50 nm.

7. The electronic device of claim 1 , wherein the dielectric structure and the isolation material each comprise SiO 2 .

8. The electronic device of claim 1 , wherein the at least one air gap vertically extends from a location proximate an uppermost vertical boundary of the additional barrier material to another location proximate lowermost vertical boundaries of the at least two of the interconnect structures.

9. The electronic device of claim 1 , wherein the additional barrier material intervenes between the at least one air gap and upper portions of the at least two of the interconnect structures, but the additional barrier material does not intervene between the at least one air gap and lower portions of the at least two of the interconnect structures.

10. The electronic device of claim 1 , further comprising at least one additional air gap laterally intervening between at least two other of the interconnect structures laterally-neighboring one another, the at least one additional air gap vertically extending from the lower portion of the isolation material and terminating at an upper surface of the additional barrier material.

11. The electronic device of claim 10 , further comprising at least one additional interconnect structure vertically extending through the isolation material and the additional barrier material, the at least one additional interconnect structure at least partially vertically overlying the at least one additional air gap and in electrical communication with at least one of the interconnect structures.

12. The electronic device of claim 11 , wherein the at least one additional interconnect structure comprises:
a lower portion exhibiting a first width in physical contact with the at least one of the interconnect structures; and
an upper portion integral and continuous with the lower portion and exhibiting a second width greater than the first width.

13. An electronic device, comprising:
a dielectric structure;
a first interconnect structure comprising a first portion and a second portion, the first portion embedded in the dielectric structure, and the second portion continuous with the first portion and protruding from the dielectric structure;
a second interconnect structure extending substantially parallel to the first interconnect structure and comprising a third portion and a fourth portion, the third portion embedded in the dielectric structure, and the fourth portion continuous with the third portion and protruding from the dielectric structure; and
an air gap in the dielectric structure between the first portion of the first interconnect structure and the third portion of the second interconnect structure.

14. The electronic device of claim 13 , wherein the air gap is elongated between the second portion of the first interconnect structure and the fourth portion of the second interconnect structure.

15. The electronic device of claim 14 , further comprising interlayer dielectric material covering the first interconnect structure and the second interconnect structure without filling the air gap.

16. The electronic device of claim 13 , further comprising a third interconnect structure comprising a fifth portion and a sixth portion, the fifth portion embedded in the dielectric structure, and the sixth portion continuous with the fifth portion and protruding from the dielectric structure, wherein a distance between the first interconnect structure and the second interconnect structure is less than a distance between the second interconnect structure and the third interconnect structure such that no air gap is in the dielectric structure between the third portion of the second interconnect structure and the fifth portion of the third interconnect structure.

17. A method of forming an electronic device, comprising:
forming interconnect structures vertically extending into a dielectric structure, the interconnect structures each comprising a conductive material and a barrier material intervening between the conductive material and the dielectric structure;
recessing the dielectric structure relative to the interconnect structures to form trenches between upper portions of the interconnect structures;
conformally forming an additional barrier material over surfaces of the interconnect structures and the dielectric structure inside and outside of the trenches;
forming a sacrificial material over the additional barrier material such that at least one of the trenches remains substantially free of the sacrificial material therein, the sacrificial material exhibiting a slot vertically extending therethrough to a remaining portion of the at least one of the trenches;
selectively removing portions of the additional barrier material exposed within the at least one o

Assignees

• Micron Technology Inc

Inventors

• Eto Toyonori
• Wang Kuo-Chen

Classifications

• H10W20/495

  Capacitive arrangements or effects of, or between wiring layers · CPC title

• H10W20/076

  in via holes or trenches · CPC title

• H10W20/032

  of conductive barrier, adhesion or liner layers · CPC title

• H10W20/072 Primary

  of dielectric parts comprising air gaps · CPC title

• H10W20/47

  comprising two or more dielectric layers having different properties, e.g. different dielectric constants · CPC title