High electron mobility transistor and method for fabricating the same

US2023378314A1 · US · A1

Patent metadata
FieldValue
Publication numberUS-2023378314-A1
Application numberUS-202318221404-A
CountryUS
Kind codeA1
Filing dateJul 13, 2023
Priority dateDec 6, 2019
Publication dateNov 23, 2023
Grant date

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.

First claim

Opening claim text (preview).

What is claimed is: 1 . A high electron mobility transistor (HEMT), comprising: a buffer layer on a substrate; a first barrier layer on the buffer layer; a p-type semiconductor layer on the first barrier layer; a hard mask on the p-type semiconductor layer; and a spacer adjacent to the p-type semiconductor layer. 2 . The HEMT of claim 1 , further comprising: a gate electrode on the p-type semiconductor layer; and a source electrode and a drain electrode adjacent to two sides of the spacer. 3 . The HEMT of claim 2 , wherein the hard mask is between the p-type semiconductor layer and the gate electrode. 4 . The HEMT of claim 1 , wherein the hard mask comprises a conductive material. 5 . The HEMT of claim 1 , further comprising a second barrier layer adjacent to the spacer on the first barrier layer.

Assignees

Inventors

Classifications

  • Nitride Group III-V materials, e.g. AlN or GaN · CPC title

  • using Group III-V semiconductor material · CPC title

  • H10D30/015Primary

    of FETs having heterojunction interface channels or heterojunction gate electrodes, e.g. HEMT · CPC title

  • comprising only Group III-V materials heterojunctions, e.g. GaN/AlGaN heterojunctions · CPC title

  • Gate regions of field-effect devices having PN junction gates · CPC title

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Frequently asked questions

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What does patent US2023378314A1 cover?
A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a first barrier layer on a substrate; forming a p-type semiconductor layer on the first barrier layer; forming a hard mask on the p-type semiconductor layer; patterning the hard mask and the p-type semiconductor layer; and forming a spacer adjacent to the hard mask and the p-type semiconductor layer.
Who is the assignee on this patent?
United Microelectronics Corp
What technology area does this patent fall under?
Primary CPC classification H10D30/015. Mapped technology areas include Electricity.
When was this patent published?
Publication date Thu Nov 23 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).