Enhancement mode gallium nitride transistor with improved gate characteristics

US8969918B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-8969918-B2
Application numberUS-75694010-A
CountryUS
Kind codeB2
Filing dateApr 8, 2010
Priority dateApr 8, 2009
Publication dateMar 3, 2015
Grant dateMar 3, 2015

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Abstract

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An enhancement mode GaN transistor having a gate pGaN structure having a thickness which avoids dielectric failure. In one embodiment, this thickness is in the range of 400 Å to 900 Å. In a preferred embodiment, the thickness is 600 Å.

First claim

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We claim: 1. An enhancement mode gallium nitride (GaN) transistor having a rated gate voltage of 5 volts, comprising: a p-type GaN gate structure with a thickness of 600 Å.

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What does patent US8969918B2 cover?
An enhancement mode GaN transistor having a gate pGaN structure having a thickness which avoids dielectric failure. In one embodiment, this thickness is in the range of 400 Å to 900 Å. In a preferred embodiment, the thickness is 600 Å.
Who is the assignee on this patent?
Lidow Alexander, Beach Robert, Nakata Alana, and 3 more
What technology area does this patent fall under?
Primary CPC classification H10D30/4755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Mar 03 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).