Method of manufacturing metal oxide film and display device including metal oxide film
US-2019115409-A1 · Apr 18, 2019 · US
Manufacturing method for semiconductor device
US2023326977A1 · US · A1
| Field | Value |
|---|---|
| Publication number | US-2023326977-A1 |
| Application number | US-202118024971-A |
| Country | US |
| Kind code | A1 |
| Filing date | Sep 1, 2021 |
| Priority date | Sep 15, 2020 |
| Publication date | Oct 12, 2023 |
| Grant date | — |
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Abstract
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A manufacturing method for a semiconductor device includes forming a dielectric film on a semiconductor substrate or on a lower electrode that is formed on a semiconductor substrate, attaching a metal to a predetermined area on a surface of the dielectric film selectively, forming a metal oxide film with an insulation property in the predetermined area on the surface of the dielectric film by applying heat treatment to the metal, and forming an upper electrode on the dielectric film in a state where the metal oxide film is formed in the predetermined area on the surface of the dielectric film.
First claim
Opening claim text (preview).
1 . A manufacturing method for a semiconductor device, including: forming a dielectric film on a semiconductor substrate or on a lower electrode that is formed on a semiconductor substrate; attaching a metal to a predetermined area on a surface of the dielectric film selectively; forming a metal oxide film with an insulation property in the predetermined area on the surface of the dielectric film by applying heat treatment to the metal; and forming an upper electrode on the dielectric film in a state where the metal oxide film is formed in the predetermined area on the surface of the dielectric film. predetermined area on the surface of the dielectric film. 2 . The manufacturing method for a semiconductor device according to claim 1 , wherein the attaching a metal includes attaching a metal to an area that includes a periphery of a crystal grain boundary that is exposed to the surface of the dielectric film selectively. 3 . The manufacturing method for a semiconductor device according to claim 2 , wherein the attaching a metal includes attaching a metal to the area that includes the periphery of the crystal grain boundary that is exposed to the surface of the dielectric film selectively by executing a plating process that uses an electron(s) that is/are conducted through a crystal grain boundary that is present in the dielectric film. 4 . The manufacturing method for a semiconductor device according to claim 1 , wherein the metal includes aluminum (Al) or a pentavalent transition metal. 5 . The manufacturing method for a semiconductor device according to claim 4 , wherein the pentavalent transition metal includes niobium (Nb) or tantalum (Ta). 6 . The manufacturing method for a semiconductor device according to claim 1 , wherein the dielectric film includes hafnium oxide (HfO2) or zirconium oxide (ZrO2). 7 . The manufacturing method for a semiconductor device according to claim 1 , wherein the forming a metal oxide film is executed at a temperature of 300° C. or lower. 8 . The manufacturing method for a semiconductor device according to claim 1 , further including annealing the metal oxide film under an inert atmosphere between the forming a metal oxide film and the forming an lower electrode. 9 . The manufacturing method for a semiconductor device according to claim 8 , wherein the annealing the metal oxide film is executed at a temperature of 500° C. or lower.
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Classifications
the material containing zirconium, e.g. ZrO2 · CPC title
the material containing tantalum, e.g. Ta2O5 · CPC title
the material containing hafnium, e.g. HfO2 · CPC title
the material containing aluminium, e.g. Al2O3 · CPC title
characterised by the metal · CPC title
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- What does patent US2023326977A1 cover?
- A manufacturing method for a semiconductor device includes forming a dielectric film on a semiconductor substrate or on a lower electrode that is formed on a semiconductor substrate, attaching a metal to a predetermined area on a surface of the dielectric film selectively, forming a metal oxide film with an insulation property in the predetermined area on the surface of the dielectric film by a…
- Who is the assignee on this patent?
- Tokyo Electron Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10D1/684. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Thu Oct 12 2023 00:00:00 GMT+0000 (Coordinated Universal Time) (A1). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).